Op-amp design: Bipolar or Cmos

He must have been a true engineer to the bones. They typicaly do not brag about their famousness level. Sad that he isn't with us anymore.

It's a bit irritating that it costs about the same as the LM324 but has half the number of the same kind of op-amps.

Best regards, Spehro Pefhany

Of course!

And the very best authors are surely those folks who wrote the word processing programs.

Best regards, Spehro Pefhany

Exactly. Also, one should keep in mind that simple amplification jobs can be done with the same scheme that digital inverters are made of. In contrast to us "discreteros" the chip guys have the luxury of picking a device geometry and thus a reasonable cross current for a desired VCC. We have to do it the other way around, adjust VCC so the cross current is reasonable.

Come to think of it, during my chip designs I never had the urge for an opamp, ever. We always did things directly, whether it was comparing two inputs, amplification, multiplying, whatever. There was a nice simple chip solution for just about any local job and it was a lot smaller than a full opamp.

This will not give you an optimal design. If you use mosfets like you would want to use bipolars, you will find that they make lousy bipolars. If you accept that they are mosfets, and design your opamp from scratch as a CMOS opamp, that will work much better.

If you have more than a few hundred logic gates in the other part of your chip, and you want low power consumption or a small die, CMOS or BiCMOS probably is better than bipolar. (BiCMOS = bipolar + CMOS, best of both worlds and most expensive process too) If you have tens of thousands of logic gates on your die then you definitely want either CMOS or BiCMOS. You could still use a bipolar opamp if you use a BiCMOS process.

What are your specs? Otherwise how long is a piece of string?

You can do well in either technology with sufficient effort.

Unless the opamp is the principal function of your chip (which would make it a very strange business proposition), the rest of the chip will probably determine the technology that you need to use. First of all, what is the rest of the chip? How many gates of digital (if any), are you designing it yourself or buying IP blocks, what is the max supply voltage you need, what kind of frequencies does the chip need to handle and how does it need to handle them, and what production volume do you anticipate? How much can you afford to spend on masks?

Also you will need to list the specs of your amplifier - offset voltage, bias current, do you need the inputs to work near both supply rails or only near one supply rail (rail to rail inputs can be a nuisance and should be avoided if you want the best linearity performance without getting into patent difficulties), do you need the output to go near both rails or only one, how many milliamps output current do you need, etc. etc. Without answering these questions and many more, it will be a case of garbage in ->

garbage out.

To throw a further spanner in the works, you may well find that an opamp is not the optimal kind of amplifier to do what you need to do. For example, it is difficult to buy stand-alone OTAs, but if you are designing your own chip then you are free from these restrictions and you might find that there are things that will achieve your goals better than an op-amp would.

Chris

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

I looked that up in 2 dictionaries, one had CLUE, see CLEW, the other had CLEW, alternate spelling for CLUE. Take your pick. BTW, my point about the managers with non engineering backgrounds is that they will, for instance, take a logic circuit designer, and assign him to design a microwave amplifier or chip, and not understand why it takes the guy a while to get on board.

Tam

Sure it wasn't a _girolle_ ?:-)

...Jim Thompson

Methinks it Soundes like ye Olde English speling!

I know it's a strange requirement, but size is not an issue. Basically, the analog circuits (op-amp, charge pump, etc) will be added to an area of 2000 to 3000 microns rectangle. The area would otherwise be wasted anyway. There are no other active circuit in this wafer, which will be combined with another wafer before dicing.

High mask count is out of the question. We would rather pick one with least mask set.

We don't know exactly until the final device is tested.

The opamp would be the first to be integrated. Other parts will just follow with the same process, hopefully.

Less than 10 additional masks.

No, we can charge pump the supply high enough to avoid rail to rail requirements.

Just enough to be A2D by an uC.

We know the structure of the design, but not the exact parameters at this point. However, we can redo a couple of masks in the final iteration. For example, adjusting the resistive values with the metal layer.

Huh? Widlar had a huge ego and knew exactly how famous he was. His girlfriend probably just didn't believe his bragging.

Anyway, this thread is giving me a headache. Way too much vagueness.

Hey OP, you are building some kind of chip, right? But then you mentioned a wafer cap, so it's MEMS??!? Why would you put the op amp on the wafer cap instead of the base chip?

Anyway, you must have a foundry... so cut out the guesswork and ask them what op amp IP they have. They can tell you what process makes sense also.

Yes, the MEMS takes up all the space of the lower wafer.

They are two different processes and no space on the base anyway.

They could be from different fab houses as well.

Are you saying you need an 18V OpAmp? That arrows you down to just a couple of foundries in the WORLD. As you've already been advised... get thee hence to a foundry.

...Jim Thompson

Then I guess it would be "soundeth", methinks :-)

Probably 12V to 15V. 3V to 5V is not enough.

^ keyboard check ahead

I know. We have to look for oldest technologies in certain area, but the newest in others. The top and bottom wafers are totally different technologies. We are also checking out different bonding and dicing processes.

And be careful when trying this stuff on a shoestring budget. BTDT (5um precision flip chip bonding and stuff like that...).

My new keyboard has stiff keys :-(

...Jim Thompson

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it

Actually, we can make the pads very big, even 10s of um. The difficult part is going through the top layer from the bottom. We would need to etch holes on the top wafer and metal fill them, and deposit metal on both sides. It sounds simple. But whenever we ask what the fab can do, they will say they can do whatever we ask (subject to their DRC).

We are in a funny position that the bottom wafer is very big and the top wafer is very sparse. So, we want to fill the top wafer with different circuits, just to share the fab costs. The op-amp building blocks and charge pumps could be built in the same wafer, but be packed in different chips. We definitely need a safe distance between them.

Jim is right, the voltage requirement would likely drive us into bipolar anyway, at least on one side of the top wafer.

would

it

Even DRCs can go out the window. Twice we absolutely had to because of size constraints. The foundry just made us sign a waiver, basically stating "we told ya that it ain't kosher but ya want it your way anyhow". It was successfully built that way for more than a decade.

Can't you all sign your names up there? SCNR...

Probably. Although, 18V doesn't sound too harsh. After all, the CD4000 series is rated up there. There are also some HV processes but your foundry might not offer any. We had the luxury of picking from foundries like ABB Hafo and automotive.

Jim, You are saying CMOS OpAmps are limited to supply voltages below 18V ? Amazing. I wasn't aware of that. Standard bipolar OpAmps extend to the double.

Rene