1. Home
  2. Electronics Design
  3. MOSFET Drain-Source Leakage

MOSFET Drain-Source Leakage

Hi :

I have screwed up and designed a circuit neglecting the Vge=0 value of drain-source current in an (N-type) MOSFET (it is discharging an integrating capacitor and the 1 to 10uA makes a few % error which is too much)

The only kludge I can do at this point is make Vge a few volts negative when I want the FET off, but I can't find any information on the effect of this on the leakage current.

Does anybody know if the drain-source current would be significantly reduced by a negative gate bias - I have a feeling that since this current is due to thermally generated carriers, a negative bias might not help.

Thanks Gary

Reply to
Gary Pace
Loading thread data ...

You're right, it's all thermal. Judging from your 1 to 10uA numbers above, I'd hazard a guess that your NMOS is way too big for your application.

What is the highest VDS you must handle? Dumping current?

...Jim Thompson

--
| James E.Thompson, P.E.                           |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
     It\'s what you learn, after you know it all, that counts.
Reply to
Jim Thompson

"Gary Pace"

** Maybe go for an Nch JFET instead.

formatting link

Leakage = 1nA max.

... Phil

Reply to
Phil Allison

I second Jim's opinion... do you need such a big fet?

John

Reply to
John Larkin

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

Jim :

Thanks.

I chose a low Rds FET because in the initial design I was concerned about reset time on the integration, but I since changed the arrangement and I now have 10's of us, so I can select a FET based on low leakage.

Gary

Reply to
Gary Pace

Can you balance it with a diode (small schottky?) to +V? (Fun stuff, I've balanced FET inputs between diodes.. equal 1N914s aren't a bad high impedance voltage divider! ;-) ) Tweak the CCS's "zero-intercept" current? Yeah yeah, it varies with temperature, right?

How much current are you dropping, anyway? I mean, I've done some pretty clean stuff with 2N4401's, like the monostable I'm fond of posting:

Mind you that was *all* within 5% -- it looked clean on the scope, no need for anything more precise than that.

Other things I've had excellent results with include a diode-gated CCS operating at 1 to 4.5e6 Hz in one range (1Hz being basically the diode/CCS leakage current, which was something in the nA range at that temperature). Same sort of idea, the current just doesn't change as suddenly. If it did, the duty cycle would be pretty impressive, like 1 second rise time, this on the leakage current.

Reply to
Tim Williams

AIUI all your dB values need to be doubled, for currents.

--

John Devereux
Reply to
John Devereux

It's 20*LOG(ratio) for voltages and currents

and 10*LOG(ratio) for power

...Jim Thompson

--
| James E.Thompson, P.E.                           |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
                          Common Values
                          Common Purpose
                         Common Buzzwords
                         Common Ignorance
Reply to
Jim Thompson

Whoops! It was late ;)

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Reply to
Tim Williams

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.