Is a mosfet floating source ok?

The source can't drift any higher than the drain (less a diode drop, but we're talking leakage currents, which is not a lot compared to a big fat junction), and if it goes lower (beyond Vgs(th)) it causes current to flow. At best there's an undefined range inbetween, but current doesn't flow in this region, so who cares? :-)

Note that, in the presence of ambient noise, the body diode will tend to rectify noise, offsetting it towards conduction; with enough noise (Vpp > Vgs(th)), this rectified current will flow as drain current. But again who cares, it'd have to be a huge noise current to drop any voltage across the drain load -- which is your reference point as far as how much counts as "on" or "off", and you can evaluate a given situation accordingly.

Basically unless you're operating in a commercial radiotransmitter, or directly adjacent to a high side gate driver, or other SMPS switching node, you'll have a very hard time inducing enough current to matter. And in such a case, I suspect you'll have much worse problems than the leakage of a stupid FET to worry about..

Tim

-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Design Website:

Looks OK to me.

I don't think you need R2. When the SQW pin goes open-drain, the fet source will pull itself up until the drop across R1 is tiny.

R2 should not be needed, but the gate does not need to be tied to the coin cell. Why can't you bias the gate of the N-FET from the 12 volts in? Two resistors in a 3:1 ratio gets you 3 volts and you should be good to go. N o coin cell drain and no worries about a floating source (even if it should n't be a problem).

Couldn't the N-Channel MOSFet simply be replaced with a 220K resistor to the /INT_SQW? Then the gate would only see around 3.75VDC when On (Low).

R2 is also gone.

John :-#)#

This commonly used arrangement is called a 'cascode'. Indeed, R2 is not needed.

Jeroen Belleman

Thanks very much. This confirms what I observed, even using a fairly ripply SMPS. Everything stayed rock solid even without R2.

From where to the INT/SQW pin? From the P-channel gate? Wouldn't that give you 8.25V there?

Also, the problem isn't when it's on. The problem is that the voltage on INT/SQW when it's off would be 12V, and the maximum allowed is 5.5V per the datasheet. I don't know for sure, and haven't tested it, but I assume there's some kind of protection stuff on that pin, and that current will flow above 5.5V.

In my circuit for switching a single 18650 supply, I just connect INT/SQW directly to the P-channel gate. But that doesn't work for anything over 5.5V.

Do you mean a divider from 12V to ground with the gate in the middle?

In the original circuit, with R2 removed there isn't ever any current flow from the coin cell to the N-channel. And there isn't any any current flow from the 12V rail when the power is off. I'd like to preserve both of those features.

Can you draw that?

Yes, the N-FET gate in the middle.

I didn't look at what is driving the N-FET. You can use large enough resis tors that the current is comparable to the leakage current through the P-FE T. But not needed as you have found.

This works because the DS3231 provides state control while drawing power fr om the coil cell. If you didn't have that you could use the N-FET with the gate connected through a resistor to the P-FET drain to form a bistable de vice, both transistors ON or both OFF drawing no power in the OFF state. T his can be controlled by adding another N-FET that pulls the first N-FET ga te to ground to turn it off (or an open collector output). Turning it on r equires another transistor to pull the P-FET gate low. Four transistors, b ut very simple and zero current when OFF.

Sorry, but you left me behind on that. I don't understand what you're saying.

It seems to me that with R2 removed I already have a circuit which draws no current from anything when the alarm has yet to be triggered and the power is off. Of course the DS3231 is still keeing time, which uses some current from the coin cell, and which it has to do anyway, but nothing extra is expended on keeping the power off. So I don't see why I need four transistors, or how they would be configured.

John :-#)#

That's the point. You are using the time chip to keep state. The FETs are just slaves doing what the time chip says. I said "if you don't have that "... The point is you can do something similar with various inputs as a tr igger without using a time keeping chip. The point of using the transistor s to form a FF is so the trigger can be passive and not even part of your d esign potentially.

Just pointing out a more general application of a similar circuit.

BTW, your circuit is not "no current", it is some low uA and may be compara ble to the current of your time chip, but it will be from the 12 volt rail which you seem to want to be careful with as well.

Urk

Minor edit...

John -#)#

Three problems:

Only 3.75 volts of gate drive is available to the pfet when SQW goes low.

The SQW pin is rated for 6 volts max.

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That would be a bad idea unless you want the p-FET to heat up in use and le ak current when not in use. With 4 volt drive it will probably turn on ok, but if you are drawing much current it will dissipate more power than if i t had closer to 12V drive. But the bad part is it won't turn off very well at all. With a 3V drive in the off state, you are going to see a lot of l eakage. Well, you may not have both problems, but you will see one or the other for sure depending on the pFET you select.

Oh, and your clock chip will likely go bye bye when it gets well over 3V on it's output. It may not latch up with 35 uA flowing into the protection d iode, but it is likely enough to make the chip not work correctly and may e nd up charging the coin cell causing damage to that!

I assumed that the MOSfet would be off via R1 and as the output of the driver is floating the gate would be at the same as the source unless /INT was active. /INT is floating unless active isn't it?

Of course I didn't RTFM for the DS3231, was just being lazy...so I guess I failed on that idea...

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d leak current when not in use. With 4 volt drive it will probably turn on ok, but if you are drawing much current it will dissipate more power than i f it had closer to 12V drive. But the bad part is it won't turn off very we ll at all. With a 3V drive in the off state, you are going to see a lot of leakage. Well, you may not have both problems, but you will see one or the other for sure depending on the pFET you select.

V on it's output. It may not latch up with 35 uA flowing into the protectio n diode, but it is likely enough to make the chip not work correctly and ma y end up charging the coin cell causing damage to that!

I didn't read the manual on the DS3231. It is possible the chip will work with 12V on the open drain output, but Larkin says something about 6V max, so this circuit would likely do damage to the chip if there is no protectio n diode. If there is a protection diode the resistor divider it will clamp the INT- output to 3V and won't move the pFET gate enough to turn it on an d off reliably. So this is a lose-lose prospect.