I obviously should have known this long ago, but in reading a couple of NMOS datasheets, I was surprised to see that their breakdown voltage has a strong positive TC, like ~ +100 mV/K. Given the usual story of thermally activated leakage, I was pretty surprised.
Anybody know the physical origin of this apparent anomaly?
Cheers
Phil Hobbs
Hmm meaning higher breakdown voltage at higher temp? How about something 'silly' like thermal expansion making the distance larger? (smaller E field for same potential)
George H.
George Herold schrieb:
Hello,
the thermal expansion number for silicon oxide is 0.5*10^-6. I think this is too small to explain the rise of breakdown voltage.
Bye
Might well be, but if so +100 mV/K seems like a lot for a 60V device--that's 1600 ppm/K.
Cheers
Phil Hobbs
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Grin.. as usual it's best if I keep my big mouth shut.
I first thought you were talking about gate to source breakdown... But now I think you meant source to drain reverse bias?
George H.
Not at all. It's something weird like that, or ionizing deep-level impurity sites, or ... ? Strange, anyway.
Yup, BV_DSS. See e.g. NTJD512, +92 mV/K @ 60V
NDS351, +26 mV/K @ 30V
Cheers
Phil Hobbs
I assume in break down the body diode just act as a zener
looking at data sheets, a 60V zener is ~+0.1%/K
-Lasse
s
Interesting, Now I just have to remind myself why zeners (greater than ~6 Volts) have a postive temp. coef.
George H.
It seems that the physical origin of that effect is the decreased mean free path of carriers at high temperature. The phonon scattering gets stronger, so the likelihood of a carrier gaining enough energy to cause an impact ionization drops. Because it's an unlikely event, i.e. way out in the wings of the probability density, it's more sensitive to temperature than one would expect.
Interesting stuff--I had no idea that the effect was that strong.
Cheers
Phil Hobbs
That's also what this reference says:
This reference mentions the effect of parasitic bipolar action on the avalanche voltage in a MOSFET, but nothing on temperature coefficient:
"Holes generated by the avalanche breakdown move from drain to source underneath the inversion layer. This hole current forward biases the source-bulk p-n diode so that now also electrons are injected as minority carriers into the p-type substrate underneath the inversion layer. These electrons arrive at the drain and again create more electron-hole pairs through avalanche multiplication. The positive feedback between the avalanche breakdown and the parasitic bipolar action results in breakdown at lower drain voltage".
Looking at the Onsemi datasheet, I gather this test is not done at VGS=0. That is, the part won't leak more than a uA at 25 deg C with VGS=0. But the breakdown is spec'd relative to 250uA into the drain at room temp, but no VGS stated. Does that mean they bias up the gate a bit (i.e. subthreshold) to get 250uA, then crank up the temperature?
The Fairchild part looks similar regarding test conditions, though the tempco is lower.
ce
isn't it just Vgs=3D0, and crank up the Vds until you see 250uA Ids for each temperature?
just like a zener is spec'ed at some Iz
-Lasse
What happens is the leakage current increases, in the same familiar doubling every 10C manner. That leakage current "interacts" with the avalanche breakdown. Useful voltage rating decreases (that is what i have seen in practice).
How about this scenario. At 25 dec G and VGS=0, they increase Vds until
250uA flows. That voltage becomes the first data point in the tempco calculation. Then they increase the temperature wit VGS=0 t o125 deg C, then do the same increase of VDS until they get 250uA.I guess what I found confusing is they didn't explicitly state VGS=0 for the tempco test.
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