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... Embarrassingly I found an error in the original circuit. The MOSFET gate is taken from the wrong output of the long-tailed pair giving positive feedback rather than negative.
Here's the corrected schematic in LTspice. I've used a transistor in the current mirror rather than a diode (that shouldn't affect performance). I haven't put any of the modifications that are being discussed for providing temperature compensation.
A couple of other modifications are that I used a proper zener (LTspice doesn't simulate the reverse VBE breakdown). I also had to feed the zener from the input rather than the battery so it starts up with the resistive load I used for simulation.
Although an opamp such as the one you are suggesting can be made to work, one difficulty I've had in the past is making the loop stable when driving a common source FET as an output stage; The extra gain in combination with the pole produced at the output of the opamp due to the large input capacitance of the FET gives too much phase shift.
The original circuit seems to work surprisingly well in simulation, the FET input capacitance works nicely to give a dominant pole compensation. The very high impedance at the node driving the FET seems to give very gig loop gain in spite of the starved input pair.
Version 4 SHEET 1 1612 680 WIRE 560 -352 512 -352 WIRE 704 -352 560 -352 WIRE 800 -352 704 -352 WIRE 896 -352 800 -352 WIRE 1120 -352 896 -352 WIRE 1296 -352 1120 -352 WIRE 1312 -352 1296 -352 WIRE 704 -320 704 -352 WIRE 800 -304 800 -352 WIRE 896 -304 896 -352 WIRE 1120 -304 1120 -352 WIRE 896 -192 896 -224 WIRE 896 -192 800 -192 WIRE 992 -192 896 -192 WIRE 1296 -160 1296 -352 WIRE 704 -144 704 -256 WIRE 736 -144 704 -144 WIRE 1120 -144 1120 -224 WIRE 1120 -144 1056 -144 WIRE 800 -80 800 -96 WIRE 1040 -80 800 -80 WIRE 1120 -80 1120 -144 WIRE 512 -64 512 -352 WIRE 992 -48 992 -96 WIRE 992 -48 896 -48 WIRE 800 -16 800 -80 WIRE 992 -16 992 -48 WIRE 896 32 896 -48 WIRE 896 32 864 32 WIRE 928 32 896 32 WIRE 1120 32 1120 0 WIRE 1200 32 1120 32 WIRE 1296 32 1296 -80 WIRE 1296 32 1200 32 WIRE 1312 32 1296 32 WIRE 1120 64 1120 32 WIRE 704 112 704 -144 WIRE 800 112 800 80 WIRE 992 112 992 80 WIRE 1040 144 1040 -80 WIRE 1056 144 1040 144 WIRE 1072 144 1056 144 WIRE 512 224 512 16 WIRE 560 224 512 224 WIRE 704 224 704 192 WIRE 704 224 560 224 WIRE 800 224 800 192 WIRE 800 224 704 224 WIRE 992 224 992 192 WIRE 992 224 800 224 WIRE 1120 224 1120 160 WIRE 1120 224 992 224 FLAG 800 -304 0 FLAG 1200 32 Vout FLAG 560 -352 VIN+ FLAG 560 224 VIN- FLAG 1056 144 VG SYMBOL res 1136 -208 R180 WINDOW 0 36 76 Left 2 WINDOW 3 36 40 Left 2 SYMATTR InstName R1 SYMATTR Value 110k SYMBOL res 912 -208 R180 WINDOW 0 36 76 Left 2 WINDOW 3 36 40 Left 2 SYMATTR InstName R6 SYMATTR Value 470k SYMBOL pnp 1056 -96 R180 WINDOW 3 55 66 Left 2 SYMATTR Value 2N3906 SYMATTR InstName Q1 SYMBOL pnp 736 -96 M180 WINDOW 3 51 67 Left 2 SYMATTR Value 2N3906 SYMATTR InstName Q3 SYMBOL npn 928 -16 R0 WINDOW 3 -39 109 Left 2 SYMATTR Value 2N3904 SYMATTR InstName Q2 SYMBOL res 816 208 R180 WINDOW 0 36 76 Left 2 WINDOW 3 36 40 Left 2 SYMATTR InstName R2 SYMATTR Value 100k SYMBOL res 1008 208 R180 WINDOW 0 36 76 Left 2 WINDOW 3 36 40 Left 2 SYMATTR InstName R3 SYMATTR Value 100k SYMBOL res 1136 16 R180 WINDOW 0 36 76 Left 2 WINDOW 3 36 40 Left 2 SYMATTR InstName R4 SYMATTR Value 110k SYMBOL npn 864 -16 M0 SYMATTR InstName Q5 SYMATTR Value 2N3904 SYMBOL res 720 208 R180 WINDOW 0 36 76 Left 2 WINDOW 3 36 40 Left 2 SYMATTR InstName R5 SYMATTR Value 270k SYMBOL nmos 1072 64 R0 SYMATTR InstName M1 SYMATTR Value IRF530 SYMBOL voltage 512 -80 R0 SYMATTR InstName V1 SYMATTR Value 14 SYMBOL zener 720 -256 R180 WINDOW 0 24 64 Left 2 WINDOW 3 24 0 Left 2 SYMATTR InstName D1 SYMATTR Value EDZV6_8B SYMBOL current 1296 -160 R0 WINDOW 3 57 154 VLeft 2 SYMATTR Value PULSE(0 -1 10u 0 0 100u) SYMATTR InstName I1 TEXT 264 -248 Left 2 ;.ac oct 1000 10k 1e6 TEXT 768 -400 Left 2 ;Solar fed lead-acid charger TEXT 328 -208 Left 2 ;.tran 250u TEXT 320 -168 Left 2 ;.dc V1 10 20 0.1 TEXT 1160 -128 Left 2 ;Load for\nsimulation TEXT 320 -128 Left 2 !.dc I1 0 2 0.1 TEXT 1184 224 Left 2 ; TEXT 1336 -352 Left 2 ;VOUT+ TEXT 1328 32 Left 2 ;VOUT-