Microcontroller to do H-bridge "Locked Anti-Phase"?

I currently use a PIC's ECCP (Enhanced CCP) module to do my PWM switching on my H-bridge-based DC motor control. I use the method where i turn on a bottom fet, keep it on, and clock the top opposite FET.

I want to do "locked antiphase" clocking now, where the top left and bottom right FETs are pulsed simultaneously are always the complement of the top right and bottom right FETs, respectively, which also pulse simultaneously. Thus a 50% duty cycle stops the motor; >50% moves it clockwise;

Reply to
valemike
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Don't you do that in software.... and use four pins out of your PIC?

DNA

Reply to
Genome

Which PIC are you currently using?

... Donkey

Reply to
Donkey D...

PIC18F458 is what I am currently using. I use the ECCP in full bridge mode to move the motor cw or ccw. But to brake the motor, I turn the ECCP into a single output PWM and pulse that bottom fet. To brake while going the other direction not covered by the single ECCP pin, I also have the single CCP configured as PWM.

Reply to
valemike

The PIC's ECCP is limited. It can't do locked antiphase PWM. Instead I would use two pins in "Half Bridge" mode, and each of these pins connects to two opposite FETs.

Reply to
valemike

There are some good micros for motor control like hitachi 3048 but their a bit expensive. You best solution is to use some external logic to direct the pwm to the fet.

Reply to
cbarn24050

The Timer/Counter/PWM unit in an Atmel AVR ATTiny26 (amongst other AVRs) can do this for you. One timer with two compare match registers each controlling a pair of complimentary outputs (with dead-time to avoid shoot-though in your bridge). Values in the two match registers are latched in at counter overflow, so can meet your simultaneous change criterion provided you ensure you can ensure you set both registers before the counter overflows (not difficult, but rules out extremely high PWM clock rates).

I can't find exactly what Atmel call this particulr type of Timer module, or how to tell which AVRs contain it. It is referred to as "High-speed PWM" in places, though that sounds quite generic to me. It is in the ATtiny26 and several other ATtinys. No idea about others, many offer PWM, some more elaborate or with more channels, but not all with complimentary outputs.

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page 74 of the datasheet for the gory details on PWM.

Tim

Reply to
Tim Auton

The timer he is already using, actually does the same. The PIC's CCP module, updates the duty cycle, on the _next_ zero of the timer module, so you can trigger an interrupt using another CCP, on the same timer, at a particular count, update both values in the interrupt routine to handle this, and the two outputs will change on the next cycle. The ECCP module (which he is using), has the similar ability to handle the antiphase pulses. I'd suggest looking carefully at the data sheet for the chip already being used!...

Best Wishes

Reply to
Roger Hamlett

Microchip tech support got back to me recently and told me that since the PWMs are "double-buffered", I can enable an interrupt by the PWM module. This interrupt has to be of high priority. Upon entry into the ISR, i can then update the duty cycles of different PWMs, and get out ASAP. It isn't until the next cycle do the new duty cycles take effect. I'm going to have to try that. I figure that the moment the PWM has interrupted to indicate a new cycle, I then have roughly 500 instruction cycles to do the duty cycle updating. This would all have to be on a DsPIC though.

A PIC18's ECCP can only do antiphase pwm if two complementary PWM pins are used. Each pin pulses two FETs. Thus the ECCP is put in "half-bridge" mode, but the actual circuit is a "full-bridge" (i.e. h-bridge). There is another function to put all four pins of the ECCP into "full-bridge" mode. But it is not locked antiphase pwm anymore. Instead it's "sign magnitude" (i think that's what it's called), where the bottom fet is held on, and you just pulse the opposite top fet. (The other two fets remain off the entire time).

Reply to
valemike

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