Low power pulse generator

D

How about a low power comparator? The output is fed back to the non-invert ing input to add hysteresis. A cap on the inverting input and a feedback r esistor from the output makes it oscillate. You can adjust the duty cycle by adding a diode and resistor in parallel with the resistor charging the c ap.

With a good comparator the only limit to the low power is the parasitic cur rents and offset voltages interacting with the resistors. How precise/accu rate do your time intervals need to be?

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  Rick C. 

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I've designed lots of micropower low-duty pulsers.

For your requirements, I'd suggest making a discrete oscillator for generating the pulse rate, then have that fire a home-made 100ns one-shot built with your SN74AUP1G14 (or even a SN74AUP1G123).

It's not hard to make a micropower oscillator. Even the classic two-BJT multivibrator will do.

Cheers, James Arthur

A micropower opamp or comparator could make a 1 KHz oscillator, with mediocre edge rates. Then speed that up with a tiny Schmitt gate, which wouldn't spend much time in its transition regions.

The final pulse generator will be interesting. An RC or RLC glitcher driving another Schmitt maybe.

The '123 parts tend to have a lot of static power dissipation (20 uA being "a lot" here)

--

John Larkin         Highland Technology, Inc 

Science teaches us to doubt. 

  Claude Bernard

This guy's output is fast enough to drastically reduce Piotr's time spent in the transition region:

(view in Courier font)

+3.3v >-+--------------------+-------. 750nA | | | .-. .-. .-. R5 | | R1 R3 | | | | 3.3M '-' 22M 22M '-' '-' | C1 | D1 | | 47pF |1n4148 | +---+--||-. .-||---+-->|---+------> 470Hz | | \ / C2 | | | .-.R2 \ 47pF.-.R4 | | | |22M / \ | |22M | | '-' / \ '-' | 2n3904 \| | / \ | |/ 2n3904 Q1 |--+---' '----+-----| Q2 .. | | | | | | === === GND GND

Another lower-parts tactic is to add voltage gain to Piotr's standard schmidt-trigger oscillator, to speed the transition. A single BJT helps reduce current draw by a lot. (But I'm not positive it would be enough savings for Piotr's purposes--maybe, or maybe not).

I might sketch that up tomorrow. But the astable multi just plain works, so that's at least a starting point.

I didn't know that--I've never checked.

Cheers, James

They seem to be too slow to generate the very high (or very low, I can adapt to that) duty cycle directly, but a little differentiator at the output feeding a Schmitt inverter might do the job.

There are truly low-power parts with a built-in reference; it would be hard to beat their current consumption with a resistor divider.

A single pulse taken in isolation is the only important factor (it will pass through an L/R divider and then be synchronously detected by a D flip-flop), so there are basically no requirements regarding their frequency. It must be high enough to make the device sufficiently responsive, and I believe the lower bound of 300Hz is fine. There is no upper frequency limit, provided the device stays within the power budget. The pulse width in the 75..200ns range is OK.

Best regards, Piotr

For the front end I would use something like a ultra low power xtal oscillator. For example the SiTime SiT1534 which has a programmable frequency in that range. Running current typ 0.9uA, Max 1.3uA so plenty left for the pulse shaper. The output rise time is 200ns max so would need a bit of sharpening.

D

An emitter coupled astable could provide the 1kHz while drawing roughly 4uA at 5V or 2.5uA at 3.3V. You get a 2:1 ,mark to space ratio, so you'd need a low power monostable to create your 100nsec spike. I've done emitter-coup led monostables, but keeping them low-power is difficult.

Here's the astable.

Version 4 SHEET 1 2896 1480 WIRE -544 576 -736 576 WIRE -336 576 -544 576 WIRE 64 576 -336 576 WIRE -544 624 -544 576 WIRE -336 624 -336 576 WIRE 64 624 64 576 WIRE -736 720 -736 576 WIRE -336 800 -336 704 WIRE -176 800 -336 800 WIRE 64 800 64 704 WIRE 64 800 -112 800 WIRE -336 832 -336 800 WIRE -544 880 -544 704 WIRE -400 880 -544 880 WIRE 64 928 64 800 WIRE -336 976 -336 928 WIRE 0 976 -336 976 WIRE -544 1040 -544 880 WIRE 64 1040 64 1024 WIRE 240 1040 64 1040 WIRE -336 1056 -336 976 WIRE 64 1072 64 1040 WIRE -544 1200 -544 1120 WIRE -336 1200 -336 1136 WIRE -336 1200 -544 1200 WIRE 64 1200 64 1152 WIRE 64 1200 -336 1200 WIRE -736 1232 -736 800 WIRE 64 1248 64 1200 FLAG 64 1248 0 FLAG -736 1232 0 FLAG 240 1040 out SYMBOL cap -112 784 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C1 SYMATTR Value 2.2n SYMBOL VOLTAGE -736 704 R0 SYMATTR InstName V1 SYMATTR Value 5 SYMBOL res -352 608 R0 SYMATTR InstName R1 SYMATTR Value 2200k SYMBOL res -560 608 R0 SYMATTR InstName R3 SYMATTR Value 2200k SYMBOL res -560 1024 R0 SYMATTR InstName R4 SYMATTR Value 2200k SYMBOL res -352 1040 R0 SYMATTR InstName R5 SYMATTR Value 220k SYMBOL res 48 1056 R0 SYMATTR InstName R6 SYMATTR Value 330k SYMBOL res 48 608 R0 SYMATTR InstName R2 SYMATTR Value 2200k SYMBOL pnp -400 928 M180 SYMATTR InstName Q1 SYMBOL pnp 0 1024 M180 SYMATTR InstName Q2 TEXT -768 1368 Left 2 !.tran 0 20ms 10ms startup

--
Bill Sloman, Sydney

On a sunny day (Mon, 22 Jun 2020 01:46:14 +0200) it happened Piotr Wyderski wrote in :

Have not tested at that low voltage, but a simple unijunction transistor makes a nice low repetion rate pulse generator. Have some 2N2646 from ebay here, one as pulse generator. Basically you have the capacitor charge current, and it can drive a pulse transformer if needed:

-------------------- + | | [ ] [ ] | | | |--- |------\ | | >|--- | |------ out === | | [ ] |____________|________ -

frequency is not very sensitve to temperature.

What is the total current drain?

.-------. .-. | | _| |_ Vdd >-|D Q|------> | _| >---|> Q|---. | | | | CLR | .-. '-------' | | O '-' | | +-------' | --- --- | --- GND

Cheers, James Arthur

I have now numbered the resistors

Would have to measure it, but basically most of the time C is charging at a very low current via R1. When the threshold voltage is reached (about 1/2 Vb or so) the UJT conducts and C is discharged via the bottom resistor R3. The only _extra_ current is then via the top resistor R2, and only for as long as the 100 ns or whatever (the power comes from the charged cap).\, when the UJT conducts.

But I really have no idea if the circuit runs at such a low voltage, never tried that. I have some new 2N2646 in a box somewhere, with a bit of luck I find it and can test it tomorrow or so, will let you know.

Milliamps, and it probably won't work at low voltages.

I don't miss UJTs a bit!

--

John Larkin         Highland Technology, Inc 

Science teaches us to doubt. 

  Claude Bernard

PS found it, build test circuit. UJT 2N2646 starts up at about 2V. But at 2.7V supply draws .54 mA So UJT is out. Pulses look OK.

This current is just what flows between B1 and B2 even if nothing oscillates.

I suspected that but I'm usually wrong. Thanks, Jan.

Discrete versions of that work well (=oscillate) at low voltage. A complementary astable works pretty well too and is less squirrely, with more degrees of freedom of operation, but saturated transistors in both of those approaches would make the 100ns target tough to reach.

Piotr's original circuit solves the problem of a high discharge-to- charging current ratio.

+3.3V -+- | R1 .-. 3.3M | | '-' | D1 +---->|-----. | | | |\ | +----| >O---+---> | |/ C1 --- 74AUP1G14 470pF --- | --- GND

But the slow slew rate burns power while the gate input is in the transition zone.

This circuit addresses that by simply shifting most of the charging cycle out of the logic gate's transition zone, holding the input solidly 'low' for most of the cap-charging cycle:

(view in Courier font) +3.3V -+- | R1 .-. 3.3M | | '-' | D1 +------>|-------. | | | |\ | |\ +---R2---| >O---+---| >O---. | |/ |/ | C1 --- 74AUP1G14 | 470pF --- | | | '--------------------------' (R2 might need a small speed-up cap)

A further refinement could bootstrap the charging voltage, to speed the slew rate through the gate's threshold zone.

But those might yield 5-to-1 or 10-to-1 improvement, which won't be enough.

The lowest parts-count is probably(?) a micropower comparator oscillator driving a homemade one-shot.

Cheers, James Arthur

That usually works with modern high-gain CMOS flops, but I have seen an analog negative-feedback loop hang up effect in that circuit.

I sometimes use an RLC for the clear, which seems snappier.

You can make a one-shot from an RC differentiator and a schmitt trigger. Or some delays into a gate.

--

John Larkin         Highland Technology, Inc 

Science teaches us to doubt. 

  Claude Bernard

The gate-differentiator is easy and obvious, but Jim Thompson's ghost insists I mustn't forward-bias the protection diodes(*), so, in Jim's honor, I used the flop approach instead.

(*)(A current-limiting resistor absolves us of that sin. Mostly.)

I think this scheme is getting pretty close to making Piotr's original approach work...

(view in Courier font) +3.3V -+- | +-----. | | R1 .-. .-. R2 3.3M | | | | 220k '-' '-' | | D1 +--------->|----------------. | | | | | |\ |\ | | +---| >O---+---| >O---' | | |/ | |/ | |/ AUP1G14 | +---| | | |>. | C1 --- | | 470pF --- -+- | | GND | | | '----------------'

The transistor amplifier's threshold 'switches' at a higher slew-rate portion of the cap-charging cycle than in Piotr's original. On top of that improvement, the BJT's gain then speeds that slew dramatically, presenting the further-accelerated slew rate at the AUP1G14's input.

The net result is less time spent in the power-hungry region, reducing power consumption proportionally.

The one-shot pulse-width is pretty sloppy (a resistor in series with the diode would help that), but the pulse-rate should be fairly predictable and stable.

Cheers, James

SCR latchup is pretty much a thing of the past in cmos gates. Use them there free diodes!

The classic double-edge pulser is to run a signal into one input of an xor, and RC delay the input to the other. Variants can spike on only one edge.

--

John Larkin         Highland Technology, Inc 

Science teaches us to doubt. 

  Claude Bernard

mandag den 22. juni 2020 kl. 19.15.28 UTC+2 skrev snipped-for-privacy@highlandsniptechnology.com:

Xilinx datasheets usually specifys max input as either ~Vcc or current limited to xx mA, and reminds you to make sure the minimum load on the supply is more than the max injected current