d the XOR monopulse f doubler with only 3.6V logic IC's for speed.
You've set the high and low thresholds to 2 and 1 volt.
't consider the power supply current.
You can set the thresholds to any level you choose to simulate worse case t olerances. Yes! that's why I labelled it "ground current" so device curren t will dominate and depend on the CMOS Family capacitance which tends to re duce with max Vdd rating historically.
I chose 1.5V median thresholds for 3.6V logic. You can get the same thresh old for the lower Vdd family and still be compatible to interface at 3.3V l ogic.
Fig. 8 shows that one's Idd is pretty ugly. But yes, I too thought there might be a CMOS schmitt trigger with lower cross-over conduction. I don't know of any, though.
Piotr's AUP1G14's is roughly the same as what I remember, IIRC, for the 74HC14 / HC132's. (I posted measurements here waaayy back when.)
I prefer lower resistances for the same reason. Piotr could lower some of the values in my examples. But after designing some fA stuff, somehow 22M doesn't bother me as much as it used to. Clean well, and coat it if it's ever gonna get dirty.
You've got to be careful tying those timing resistors directly to Vcc--if they aren't at least 10x the collector resistor values (and I prefer 20x as a minimum, 50x is better), it's very easy to get an oscillator that won't start. Tying the timing resistors collector-to-base guarantees the BJTs will be linear, and the oscillator will start.
Piotr, below is a buffered astable that uses some extra parts and a little extra current to get much-faster output edges. That'll save you power wastage in the AUP1G14, so it's worth it.
It's fun going old-school with these designs, but a micropower comparator for the oscillator is probably less trouble overall. Definitely fewer parts.
The basic micropower conflict with these sorts of pulse generators is that you *need* a slow timing ramp to set the oscillator period, but you *must not* feed a slow ramp into a CMOS input.
Cheers, James Arthur
Version 4 SHEET 1 1336 680 WIRE 256 144 128 144 WIRE 576 144 256 144 WIRE 688 144 576 144 WIRE 816 144 688 144 WIRE 128 160 128 144 WIRE 256 176 256 144 WIRE 576 176 576 144 WIRE 816 176 816 144 WIRE 752 224 688 224 WIRE 688 240 688 224 WIRE 128 256 128 240 WIRE 752 272 752 224 WIRE 896 272 752 272 WIRE 256 288 256 256 WIRE 336 288 256 288 WIRE 400 288 336 288 WIRE 576 288 576 256 WIRE 576 288 560 288 WIRE 624 288 576 288 WIRE 336 320 336 288 WIRE 576 320 576 288 WIRE 816 336 816 256 WIRE 816 336 688 336 WIRE 128 352 128 336 WIRE 256 368 256 288 WIRE 816 368 816 336 WIRE 336 416 336 400 WIRE 336 416 320 416 WIRE 464 416 496 288 WIRE 464 416 336 416 WIRE 496 416 464 288 WIRE 576 416 576 400 WIRE 576 416 496 416 WIRE 752 416 576 416 WIRE 256 480 256 464 WIRE 816 480 816 464 FLAG 128 352 0 FLAG 816 480 0 FLAG 256 480 0 FLAG 896 272 out SYMBOL npn 320 368 M0 SYMATTR InstName Q1 SYMATTR Value BC547B SYMBOL voltage 128 240 R0 SYMATTR InstName V1 SYMATTR Value 3.3 SYMBOL res 800 160 R0 SYMATTR InstName R8 SYMATTR Value 4.7meg SYMBOL npn 752 368 R0 SYMATTR InstName Q3 SYMATTR Value BC547B SYMBOL res 320 304 R0 SYMATTR InstName R2 SYMATTR Value 22meg SYMBOL res 240 160 R0 SYMATTR InstName R4 SYMATTR Value 3.3meg SYMBOL cap 560 272 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C1 SYMATTR Value 100pF SYMBOL res 560 304 R0 SYMATTR InstName R5 SYMATTR Value 22meg SYMBOL cap 464 272 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C2 SYMATTR Value 82pF SYMBOL res 560 160 R0 SYMATTR InstName R1 SYMATTR Value 3.3meg SYMBOL res 112 144 R0 SYMATTR InstName R3 SYMATTR Value 1m SYMBOL npn 624 240 R0 SYMATTR InstName Q2 SYMATTR Value BC547B SYMBOL res 672 128 R0 SYMATTR InstName R6 SYMATTR Value 2.2meg TEXT 872 168 Left 2 !.tran 0 50mS 0 1m TEXT 88 64 Left 2 ;7/13/2008 by James Arthur\n 21-Jun-2020 mod'd for 500Hz, Vcc=3.3V. jda\n 22-Jun-2020 added buffer TEXT 600 80 Left 2 ;1.6uA @ 3.3V / 370 Hz
and the XOR monopulse f doubler with only 3.6V logic IC's for speed.
You've set the high and low thresholds to 2 and 1 volt.
sn't consider the power supply current.
tolerances. Yes! that's why I labelled it "ground current" so device curr ent will dominate and depend on the CMOS Family capacitance which tends to reduce with max Vdd rating historically.
shold for the lower Vdd family and still be compatible to interface at 3.3V logic.
The problem is the thresholds are much closer together than you imagine and not well controlled. So the frequency varies a great deal. Even if frequ ency control is not a problem, you have not simulated anything anyone cares about. I can calculate the ground current in the discretes without a simu lation and they are easy to control.
The current the OP is concerned about is the power supply current to the in verter when the input is near the threshold voltage in a linear region. Wi th such a small hysteresis that this device has, the input voltage will spe nd a disproportionate amount of time in the threshold region enhancing the impact of the linear region current.
It's just not a good approach for a very low power circuit.
In general, it's a lot better if you don't make stuff up when you do simula tions. It's also better if you understand the problem that needs to be sol ved.
--
Rick C.
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On Tuesday, June 23, 2020 at 8:51:11 AM UTC+10, Piotr Wyderski wrote:
This takes my circuit a bit further, to the point of generating a rail-to-r ail pulse which is about 20usec wide. What I need to do is work out how to create a complementary monostable which can draw very little current most o f the time.
There are patents and papers which suggest that this is practical. This cir cuit incorporates some thinking about this, but nowhere near enough.
SYMBOL res 352 480 R0 SYMATTR InstName R7 SYMATTR Value 10000k TEXT -760 1568 Left 2 !.tran 0 20ms 10ms startup TEXT -760 1608 Left 0 !.model BFR92A NPN(IS=0.1213E-15 VAF=30 BF=94.7
About a year ago I did some measurements on cross-over current for Schmitt inverters and buffers (dual gate '2G14 and '2G17, 5V supply, current for a single gate): NXP HCT series 0.26mA on rising edge / 0.1mA falling, threshold 1.6 /
1.0V NXP HC 0.2 / 0.55mA, 2.9 / 1.7V NXP LVC 28 / 8.5mA, 2.7 / 1.7V TI LVC 15 / 28mA, 2.7 / 1.8V so a couple of inputs near threshold can ruin your day...
A curve of supply current vs input level should be mandatory on Schmitt gate data sheets, but is rarely seen. Semi companies must have a staff of censors who remove embarassing stuff from data sheets before they are unleashed on the public.
--
John Larkin Highland Technology, Inc
Science teaches us to doubt.
Claude Bernard
Datasheets for that new T.I. family -- HCS -- I referenced about have Iq vs. Vin curves too, but those curves just show that the new parts are still not micropower-friendly.
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Piotr could cut the shoot-through current considerably by lowering the supply voltage, but the part I just linked still draws 40uA in the transition zone. That means Piotr's circuit still draw (calculates furiously) about 40uA.
I have just finished the prototype (no pulse shaping yet) based on the TLV3691, exactly as depicted above. All the comparator-connected resistors are 10M, the capacitor is 100p. The frequency does not depend much on the supply voltage and is about 620Hz. The edges are super-sharp. The oscillator works correctly down to V_IN=410mV (!) and at 3.3V it draws 600nA (!!!). I think I could further cut the current consumption down by at least 30% by increasing the resistors to 22M. Still, it would be pointless from the power budget point of view and would unnecessarily jeopardize the noise sensitivity. This comparator is an incredible part.
I am not sure about the pulse shaper, though. I was afraid that the edges would not be sharp enough at this power level, and such a simple differentiator would fail. The oscilloscope shows that this is not the case. I wanted to start with a positive edge detector based on the
74AUP57. When completed, I will share a complete diagram and the performance figures of the circuit.
Again, thank you all for your help, now I am an order of magnitude below my initial requirements.
It converts it to light. If you make this light visible, it is not exactly wasted -- you have an indicator.
This is not that simple, if you want to keep the power really low. Even the small BT149 has leakage current of 100uA, so your resistor would need to provide at least that much to make the circuit operational.
A little bit of capacitance across the positive feedback resistor might increase the slew rate at the comparator output, especially if you increase the resistors. Faster slew should reduce supply current.
The nodes inside an IC can be a lot smaller, less capacitance, than anything you can build from parts.
--
John Larkin Highland Technology, Inc
Science teaches us to doubt.
Claude Bernard
800nA@3.3V, works reliably under a volt. Decoupling the oscillator and the pulse shaper turned out to be the missing component of the ultimate success.
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