Once the transistor saturates, the excess current flows through the base alone, so turn-off is fighting storage time, depending on CTE. The cascode is handy for voltage gain though; I've done gate drivers with a similar circuit inside.
Tim
-- Seven Transistor Labs Electrical Engineering Consultation Website: http://seventransistorlabs.com
You can get about the same effect from just using the opto with a low-value collector resistor and a sensitive comparator. Add an inductor to snap things up a bit, approximately matching L/R to the apparent RC [1]
I'd do that, but my FPGA comes with sloppy, but free, comparators.
[1] revisiting the recently maligned equation, L = K * R^2 * C-- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation
The phototransistor turn-off is more than slow enough so that Q1's storage time doesn't matter.
You can use a 2n2369 if you want to, but it doesn't make any difference. Try it!
Cheers, James Arthur
Yes, where comparators come cheaper than transistors.
I'm not immediately sure how to use that trick here and still get the voltages guaranteed in range for your FPGA without using a bunch of parts...
The cascode emitter only swings about 70mV to get rail the collector in my sim, so it's roughly 3-4x faster than clamping alone.
STOP POSTING EQUATIONS. You'll discourage the ... (no, I won't say it ;-)
Cheers, James
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