lots of schottky diodes in a package

I'm going to have 48 signal lines that I want to clamp to a 1.5 volt bus, with a low-capacitance back-to-back schottky pair.

A 3-pin dual schottky diode does one line.

A 4-pin schottky bridge or ring does two.

Does anybody know of a package that will do more?

The application is to speed up an optocoupler (48 of them, actually) by clamping the phototransistor collector to 1.5 +-0.3 or something like that, with emitter grounded and a collector pullup resistor to +5 or some such. The optos we have in mind are pretty fast, a few us, if they are not allowed to saturate. The clamped outputs will go directly into an FPGA that has an accurate, programmed

1.5 volt logic threshold.
--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation
Reply to
John Larkin
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4 independent:

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4 lumped together:

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8 lumped together:

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32 lumped together:

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Cheers

Klaus

Reply to
Klaus Kragelund

You could try to apply one of the various Schottky Diode Arrays that various vendors supply for ESD protection. Nothing stops you from using one of these as a clamp for 1.5 volts.

One part that comes to mind is the On Semi NUP4302 part which can clamp four signal lines. Data sheet at following link.

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The other company whose parts I have used in the past is SEMICONWELL. They make as assortment of different Schottky Diode clamp arrays that have many channels. For your application of 48 channels you could use three of their 16-channel parts such as their SW DN005-16 which can clamp at 50 mA. The link below takes you to the data page for the mentioned part. Feel free to study their site for parts with different numbers of channels and other current ratings.

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--

Michael Karas 
Carousel Design Solutions 
http://www.carousel-design.com
Reply to
Michael Karas

32 lumped from Diodes.com:

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Reply to
Klaus Kragelund

On a sunny day (Mon, 13 Jan 2014 22:17:03 -0800) it happened John Larkin wrote in :

Na, yaaaa, wild idea,

8 CMOS HC245 like buffer inputs with the chip's supply connected to ground ... Uses the input protection diodes... Have not tried it .... :-) Maybe that will not work...
Reply to
Jan Panteltje

ON Semi CM1230, CM1213, or CM1216? Eight channels per chip, 1.2 to 2 pF max depending on which one. The 1230 comes in BGA, 2.5 x 1 mm; the others have leads.

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I don't know if these suck or not; I just Googled them. ON has some with more channels, but they appear to be designed for HDMI, rather than being general-purpose.

Standard disclaimers apply: I don't get money or other consideration from any companies mentioned.

Matt Roberds

Reply to
mroberds

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Reply to
Artem

Den tirsdag den 14. januar 2014 07.17.03 UTC+1 skrev John Larkin:

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8 channels in msop10

-Lasse

Reply to
Lasse Langwadt Christensen

On Tuesday, 14 January 2014 20:49:13 UTC+11, Lasse Langwadt Christensen wr ote:

s, with a

clamping the phototransistor collector to 1.5 +-0.3 or something like that , with emitter grounded and a collector pullup resistor to +5 or some such. The optos we have in mind are pretty fast, a few us, if they are not allow ed to saturate. The clamped outputs will go directly into an FPGA that has an accurate, programmed 1.5 volt logic threshold.

Plus the the 4- and 32-diode options in the other response.

What sci.electronics.design is supposed to be about.

Nice one Lasse.

--
Bill Sloman, Sydney
Reply to
Bill Sloman

Cool. Thanks for the tips.

This looks pretty good:

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The ACPL227/247 is available with a 2:1 CTR spread, still pretty cheap. That makes the math a lot better here.

--

John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

Den tirsdag den 14. januar 2014 19.36.59 UTC+1 skrev John Larkin:

wouldn't a single diode work?

-Lasse

Reply to
Lasse Langwadt Christensen

Probably. I actually tried that, single diode to keep the phototransistor collector voltage up, but the rise/fall isn't as symmetric. Since the multiple diode packages exist, I may as well clamp in both directions.

With dual clamping, the pullup resistor can act like a constant-current source. That can be, say, 0.5 mA from +5 or something like that. We can clamp to a center of 1.5 volts and program the FPGA input vref to be the same.

The symmetric clamp is elegant, and that counts too.

We're actually going to do a hidden/background BIST on an optocoupled input circuit. We will use a pulse transformer to briefly force the opto on and then off, and verify the outputs. We'll freeze the customer data path (which will have digital lowpass filtering anyhow) so, if we can get each test done in a few 10s of microseconds, the self-test won't interfere with normal data acquisition.

--

John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

Tsk tsk. Another of those evil beta-dependent circuits. ;)

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Hfe = 1.

--

John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

Or, you could put a smallish emitter resistor in (50 ohms), and connect the collector to a capacitor to ground (and a pullup resistor, of course). The emitter output is low inpedance, so you get the same benefit as if the collector is clamped (at high frequency), while not having the frequency-dependence that the collector-as-output shows.

Then, instead of lotsa diodes, you'd need lotsa comparators (for the low-ish output signal, maybe aim for 100 mV on that emitter resistor). Multiple-per-package comparators are still easy to find, I trust.

Reply to
whit3rd

with an FPGA lvds input could work, no extra components but twice as many pins

-Lasse

Reply to
Lasse Langwadt Christensen

Our Altera FPGA has a mode like LVDS except that many single-ended inputs can share a common Vref pin. It essentially has a comparator per pin. The common-mode limits are such that we can't (legally) work close to ground, but something like +1.2 or some such would be OK, and if we use that as the diode clamp voltage, we should keep the phototransistor out of saturation. We're scrutinizing the FPGA specs and working out the details.

--

John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

Central Semi (I think,been a while) has the CM1215-02SR which is 4 diodes that will clamp two separate lines at 2 levels, nominally Vcc and Vee SOT143 package. I think they are "ordinary" diodes.

Reply to
Robert Baer

Did someone say "beta-dependent circuit?" ...

Vcc -+- | .-. | | Rl | | '-' | +----> | |/

+1.0v ---| Q1 |>. | +-> >--. | | | .-. |/ | | 100K ~> | | | (optional, ~> |>. '-' for speed) | | === ===

That's fast. (Add Q1(re) if you don't like the "beta dependent" aspect.)

Cheers, James Arthur

Reply to
dagmargoodboat

I simulated it just for fun. Since Q1 saturates, Vbb can be profitably changed to 1.5v, reducing the slew slightly. Or not--the rise time's pretty fast, so it doesn't make a lot of difference.

Not as handy as the schottky arrays ... it's just for fun.

Cheers, James Arthur

Reply to
dagmargoodboat

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