onsdag den 3. juni 2020 kl. 04.04.47 UTC+2 skrev Ricketty C:
now
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ootprint
re pin 1 should be, jlcpcb uses the way the part is in the tape
ntents of the XYRS file that the tool spits out? I would expect that to in dicate the orientation on the PCB. Are you saying the jlcpcb program indic ates how much to turn the part rather than where it should be? I'm just no t following this.
the files has placement and rotation, Kicad and jlcpcb has different defini tions of what 0 degrees rotation means
on, just need to add the lcsc part number as a field to the schematic symbo l
believe they also do a manual check if the silkscreen shown the pin 1 locat ion
I do know it fails from time to time.
for say a TQFP there's four ways you can decide to call 0 degrees, which on e do you pick?
As someone that hasn't used KiCad yet, but expects to soon, my comment is "excellent" :)
I have three peeves about many schematics that I see: - principal signal flow in any random direction - if a wire leaves one schematic, it isn't clear which other schematic(s) is reappears on - signal/bus wires that are named but not visually connected
The latter really pisses me off, since on a PDF I have to use ctrl-f to understand connectivity, and the schematic cannot be usefully printed out.
No, it isn't merely modern diagrams that do that, you also find it in old Tek schematics.
I hate hierarchicals and busses and any abstraction that hides what's actually on the board. I do everything flat... currently a 31-page schematic with five basically identical output channels, each on its own sheet. I know exactly where R114 is.
I do start a schematic with sheet 1 being the block diagram and sheet list/table of contents. Sheets have both numbers and names in the PADS pulldown menu.
The old Tek and HP schematics just sort of suggested where an offpage signal went. There was no formal concept of a net name.
Some schematic editors are just plain ugly. The old ORCAD was ghastly, and dangerous.
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John Larkin Highland Technology, Inc
Science teaches us to doubt.
't about picking up really. It's about issues of multiple pages. They don 't really support a flat, multi-page schematic. It must be hierarchical. So to have a two page schematic, you must have a top sheet and one or more lower sheets.
es. That seems oddly inconsistent.
Not really. The trouble with displays is that you can really only see one p age at a time in enough detail to make it useful, so you really need a hier achy to provide a structure that you can wander around. Wandering from one page to the next in a flat structure is a situation where you can easily ge t yourself lost.
Another viewpoint is to consider the analogous situation in large-scale software systems.
For one person developing a small piece of code, nothing much is needed.
But in a large system that requires modification over the years, it has been found necessary to develop techniques that have the same characteristics as hierarchical hardware schematics.
Example 1: all the various UML structural component diagrams.
Example 2: the currently fashionable "inversion of control" techniques. If you sit down and think about what they are attempting to rectify, and how they are doing it, then you see they are connecting stand-alone components and sub-components in a hierarchy.
Of course you do. You don't do anything complicated, where the abstractions are required to keep the over-all circuit manageable and comprehensible.
But you'd start to run out of puff when you needed to find R501.
I once spent a happy couple of days finding a bunch of missing and duplicat ed terminal resistors on a triple-extend Eurocard which was mostly 100k ECL .
It had been laid out by sub-contractors who were pretty good, but the proje ct manager had committed to an unrealistic project schedule, and panicked, and got them to send the layout off to the printed circuit shop before it h ad been properly checked or design-reviewed.
The layout came back from the printed circuit shop with a lot of queries an d I got stuck with sorting them out - nobody else in-house knew enough abou t the board to do it - and it did take a while.
By the time we'd got the board made we were able to get hold of faster ECL- RAM in surface mount packages, and promptly redesigned the board to make it faster, simpler and cheaper - not what you want to do when developing at p rototype from scratch, but in this case it was worth it.
I used Orcad in 1991-93 in Cambridge for schematic capture and it wasn't to o bad. When I moved to the Nijmegen University science workshop in 1993 we had a slightly later version of Orcad,and that worked too. Just before I m oved on the workshop switched to an even later version and added the Orcad printed circuit layout program, which was diabolical.
The circuits I was working on were big, and the schematics had been made by copying and repeating large chunks, then relabelling the bus connections, using the old Orcad. We could switch the schematics to the new layout easi ly enough but to get the layout program to work we'd have had to add the fo otprints and a bunch of other detail to each of the new pages, before it wo uld even try to auto-route it, and it didn't offer manual routing at all.
After I'd left Orcad had reacted to a lot of user pressure by letting the l ayout person add the detail manually as the board was being laid out, but t he first version had been automatic only.
A PCB is very different from code. Multiple copies have to be assembled my manufacturing, from purchased or fabricated parts. Each board needs to be inspected and tested. If changes must be made, they will be applied, per an ECO, to every board, by manufacturing.
Field changes are physical and expensive.
A computer program doesn't need many identical copies of a subroutine. A circuit board often does, but they usually wind up be not quite exactly identical. They are certainly physically distinct, even if they look alike on paper.
Computer programs don't need ground or power planes. They should have test points and BIST, but they seldom do.
Very different.
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John Larkin Highland Technology, Inc
Science teaches us to doubt.
I used Orcad around that tiemframe too, and was amazed at how fast decent schematics could be created and modified using a keyboard and without a mouse. Another engineer, quite reasonably, refused to believe it until I demonstrated it.
I avoided the PCB layout, though.
Moving on to a full Metal Graphics suite was painful. It made the easy things difficult.
I need to learn KiCad now. Many accounts indicate that it is now usable, even good.
We rarely allow customers to see schematics. A trusted one, or one who pays, can have the PADS files and a PDF of the entire schematic. Many other pcb programs will open PADS files. The viewers are free from Mentor.
It's essentially impossible for a customer to maintain our products; each needs a rack full of gear to test and cal.
How does a heirarichal schematic make it easier to find connections on the schematic, or a physical part on a board?
We don't keep paper copies of schematics or layouts. I agree that PDFs, and the ability to read from USB hard drives, will be around for the life of the equipment.
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John Larkin Highland Technology, Inc
Science teaches us to doubt.
onsdag den 3. juni 2020 kl. 14.18.53 UTC+2 skrev snipped-for-privacy@highlandsniptechnology.com:
since it is R1xx on page 1
so whats the difference? I have a page 1 with a number of blocks and how they are connected each of those blocks is a schematic. It is possible to more than one block point to the same schematic but it doesn't have to, each can have its own so it just like your multipage schematic
and if you print it you get all the pages even if some of them are the same except for designators
The heirarichal schematics that I've seen, signals go into instances of boxes, and change net name inside each box. No thanks.
R114 is on my schematic and on my PCB. The reference designator (50 mils high, 6 wide lines) fits next to the resistor on the top silk. What does a refdes look like on a heirarichal-schematic PCB?
My channels are not always identical anyhow. I might decide to use three bypass caps over 5 channels. Or put the clock terminator in one. Or change a part value in one.
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John Larkin Highland Technology, Inc
picosecond timing precision measurement
After a PCB layout is done, we resequence the reference designators in the physical pattern that manufacturing and testing like, sort of raster scan from lower-left, and we back-annotate the schematic.
My block diagram is architectural and functional. If I did a sheet 1 as a hierarchical structure that actually created all the connections, it would be an unreadable nightmare.
It is possible to more than one block point to the same schematic but it doesn't have to, each can
Sounds like complexity for its own sake. Many engineers like to do that, as opposed to just getting the job done. They come up with bizarre justifications for doing elaborate things.
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John Larkin Highland Technology, Inc
picosecond timing precision measurement
I am aware that a big program will have thousands of bugs in its lifetime, and may be remotely updated every month or so.
We don't prototype and expect rev A to be built by production, to released drawings, and we expect it to work and be shipped. The first release that we test, we expect to ship to a paying customer.
Does anyone do software that way?
The similarities of that statement, six times, are tedious.
Do you design electronics?
??? Hardware change requires releasing an ECO, getting physical access to the product, and doing mechanical things, then testing and calibrating.
Oh please. Repeating a thing N times doesn't make it true.
Do you design electronics? Schematics, pcb layouts, parts on boards?
Few posters to s.e.d. actually do. Fewer are very good at it.
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John Larkin Highland Technology, Inc
picosecond timing precision measurement
onsdag den 3. juni 2020 kl. 22.11.44 UTC+2 skrev John Larkin:
it's all matter of preference, leave it like the schematic editor does it and you knnow what page it is and those components a around section of components have designators close together
how do you connect between pages then, global labels?
Yes, we call them off-page connections, or just off-pages. Sometimes they connect on the same page.
I recently connected the emitter of a transistor to a test point, using two off-pages immediately facing one another. That forced a net name that PADS would otherwise not handle the way I want. The test point is only there as a way to drill down to a layer-5 copper pour used as a guard.
Board blue!
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John Larkin Highland Technology, Inc
picosecond timing precision measurement
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