Job Description

Shhhht! Not so loud. Those are the guys that bring guys like us a steady income ;-)

Well, those, and then the ones who split ground planes.

I am no IC designer, but a google search on [ analog IC test-benches regression ] comes up with things like "Verification of Complex Analog and RF IC Designs" with paragraphs such as:

From the paragraphs above, it looks like an adaptation of the usual sort of regression testing I do on embedded software applied to analog IC design. Am I missing something?

References:

It sounds like they are fudging the test plan because the part doesn't meet spec and/or match the simulations.

My approach is to go back and see why the modeling doesn't match the results, and prove/fix the model.

If you allow fudging the specs, what's the point of designing to a spec in the first place?

...Jim Thompson

Proper design procedures as outlined in there are necessary and unfortunately often violated. I follow a kind of check list when I design because my background is medical. This also means that I start with documentation, don't jump right into CAD.

But at the end of the day analog design is somewhat of an art, whether it's chip level or board level. You cannot regression-test cleverness into a design. And you can't turn analog design into a VHDL-style process, except maybe for the most mundane stuff where you never really touch the limits of devices or of a process.

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

"Fudging the specs" seems to be a somewhat common occurrence these days because...

Given how popular microcontrollers are to flash LEDs, I suspect that there's probably a lot of AHDL/Verilog A code out there that implements stuff like

Possibly. Every time I checked out PSoC with some analog blocks in there and took a closer look at the specs I could not resist an extended yawn. A lot of water will have to flow down the Klondike before I hop onto that bandwagon. In high-cost countries where companies often insist on local stuffing (such as Europe) that can be very different because their placement costs per SMT-part can be outrageous.

One of my clients (who shall remain nameless) bought into using an "optimizer"... spent big bucks on it.

They ran it on my BandGap design and killed it dead... wouldn't start-up ;-)

...Jim Thompson

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

Did it still *simulate* correctly? Or is that the sort of thing you can't really simulate accurately in the first place?

We once had a shoot-out: Me, having designed a front end in discretes, plus other guys who designed the rest of the machine (ultrasound). All seat-of-the-pants style. Worked. The other guys did a full-blown chip design, many times more engineers, their machine cost a whole lot more, they had fancy Mentor stations and the whole nine yards. Then came the moment of truth. A big fat patient was rolled in and the doc needed to scan the aorta, saying that he tried all the other machines they had and none would give him a good Doppler signal. Our machine won, big time. That wasn't s'posed to happen ...

They were to _only_ optimize the TC. I _can_ simulate start-ups quite accurately... apparently the "optimizer" couldn't ;-)

I can see optimizers viable only a limited set of variables.

...Jim Thompson

That sort of thing happens with me all the time.

The funniest situation was with a MIL-STD-429 driver (if I recall the standard number correctly). The customer fired up their 'scope and looked at the output waveform, then asked, "What's that?". Turns out they'd never seen a waveform that actually matched the specification before ;-)

...Jim Thompson

I'm too lazy to check the links, but in the software and digital logic world, "regression testing" means to test the parts that used to work to make sure that adding the nifty new features didn't break the old stuff.

Kinda like making sure that the car will go up the hill with the air conditioning on.

Looks like it's really testing the digital controls of an analog design.

...Jim Thompson

Properly baked, even fudge has specifications.....

-mpm

I guess that's what happens when marketing "specifies" :-(

...Jim Thompson

-- | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | |

Or did the optimization not include optimizing the startup margin?

Best regards, Spehro Pefhany

Yup. And to do it in an automated fashion, usually running a full test suite every night. Just when you think you are wasting your time you discover some stupid error that messes up something you really thought was unrelated.

I once ran into a CMOS hex inverter with no VCC connected, just a 0.1 capacitor. As long as any of the inpurts were 1, the internal protection diodes powered up the IC, but when by chance all went to 0, you got (after a short delay) all 0s instead of all 1s on the outputs, causing six simultanious faults, which triggered a fault condition that just happened to put a 1 on one of the input pins, fixing the problem...

Yup. That's what the URLs I posted are talking about. I have no idea why Jom thinks it has something to do with fudging specs. I can fudge specs just fine by hand -- no automation needed!

When I was doing work at the GM test track, they had a series of tests that they ran on each vehicle once a month. Part of the test was parking one on a 30 degree slope for 24 hours, repeating with four vehicles parked nose up, nose down, left up and left down. The main thing they were looking for was leaks, but they had a checklist of other quick tests just in case something unrelated went bad. In one case they had an unexpected current draw that would have drained the battery, but only when nose up. Turns out that the switch that turned on the under-hood light was coming on.

Right, that's an alternative meaning I'm familiar with too...