pins.
Only in binary. If the logic has 3 values, one pin is like one egg. (an oeuf).
Tri-state inputs are certainly not unheard of, especially on ICs where active devices cost much less than pins.
Is there an "auto-detect" tri-state buffer?
Feb 15, 2009
33 Replies
Nice!
Ed
On a sunny day (Sun, 15 Feb 2009 19:17:30 -0500) it happened Spehro Pefhany wrote in :
pins.
Yes
About the only case I know about was Philips with the 'sandcastle' pulse. That pulse was a combination of blanking and sync IIRC, saved them a pin on a TV chip.
In FLASH memory, multiple level (I think they are up to 4 levels now, so 4 bits per cell) are used, probably they use some comparators and gates to 'decode' to binary.
For multiple signals via one wire I think these days 'serial links' are in. With FPGA (and those are not short of pins normally), you see super fast serial connects at Gbit speed (like >6 Gbits/second) as interconnect emerging. I do not expect much of multiple analog level connects, it is simply more complicated, less noise margin, slower, and has less data transfer capability, then either more wires, or a serial link. Power of 2.
this
pins.
One I can recall is some TI op-amps, where a single pin sets one of three bias levels TLC271? I've seen others as well.
per
binary.
4 levels would be 2 bits per cell. You'd need 16 levels to get 4 bits-- and would have to have sense amplifiers that are good to single-digit % stability over temperature and other variations.connects
complicated,
more wires,
On a sunny day (Mon, 16 Feb 2009 11:36:25 -0500) it happened Spehro Pefhany wrote in :
bits per
binary.
Yes, I did mean 4 bits,:
formatting link
Auf der ISSCC verraten SanDisk/Toshiba etwas mehr zu ihrem bereits angekündigten Multi-Level-Cell-(MLC-)NAND-Flash mit 64 GBit Kapazität, das zwar noch aus der 43-nm-Fertigung kommt, aber 4 Bit pro Zelle speichert. Dennoch soll sich der Chip mit 5,6 MByte/s beschreiben lassen.
As you are so good in French , with 'egg', I thought you would do German too.... Anyways, it says that SanDisk/Toshiba have a multilevel NAND FLASH with 4 bits per cell.
How they do it? I dunno.
It's doable, but probably WAY more work than just tracking down and extending the enable signal from the driving part.
Good Luck! Rich
If you have CGI capability, you could block out access from everything except your own server, with a little clever scripting.
Good Luck! Rich
Difficult, huh. How about two transistors and four resistors?
Vladimir Vassilevsky DSP and Mixed Signal Design Consultant
formatting link
That's similar to what I do, but I do occasionally put up temporary photos for people to see - which breaks if you use webmail or webnews.
autodetect is tricky. maybe do this:
--+-- VCC / |/ C -----| NPN | |\\| | --\\ pic ---+-[1K]--+--- | |/ | |/- `----| PNP |\\ \\ ----+-- GND
I don' think the original poster was after that, more he wanted to use the pin bidirectionally
relatively easy to do in analogue
+V | [R3] | in --[R1]--+--- Vout | [R2] | -Vanother chip that used tristate inputs is the MC145026/145028 encoder/decoder pair historically used for garage door remotes etc.
so many resistors ?
That doesn't go rail-to-rail, which might bother some logic buses.
...Jim Thompson
| James E.Thompson, P.E. | mens |
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With all this hope and change, all you need is a dab of mayonaisse
and you\'ll have a tasty lunch.
Actually it does, via the 1k. Slow tail at the end, and all that that implies, yadda yadda yadda.
Cheers, James Arthur
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