Interesting sensor design problem

Sometimes when I pull a fast one I'll say, "Good thing I'm smart." That usually elicites a chuckle.

I don't recall seeing any circuits using transistors to make a better r-r, like you suggest doing with the TIPs. Again, we don't know what accuracy the OP needs at the endpoints, but how perfect can we get?

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Best Regards,
Mike

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I don't see why not, its a pretty good circuit. So what if it needs a little reverence to make it work?

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kensmith@rahul.net   forging knowledge

But then you need a (-)Vref. Since we only have +5 and GND, why add a supply voltage just to make it?

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kensmith@rahul.net   forging knowledge

In article , Active8 wrote: [...]

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With r-r op-amps running on GND and +3, it looks like subtraction is just right. What did I miss?

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kensmith@rahul.net   forging knowledge

"Fred Bloggs" schreef in bericht news: snipped-for-privacy@nospam.com...

Well, my intuition told me that the common-mode voltage was perhaps not a problem. The bridge is sitting practically still at 1.5V all the time, looking at it from a distance.

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Thanks, Frank.
(remove 'q' and 'invalid' when replying by email)

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I thought someone else had already introduced them but you are right I should have specified. The circuit assumes r-r.

Yes this flew right by me. I didn't do any math for my posting. This is why I left all the values unspecified.

We could use the 4th section of a quad op-amp to make a Mickey Mouse comparitor and flip an analog switch to the +3V at the right point.

[...]

When I do this sort of thing I often try to suggest that it is because I'm very smart. About 1 in 3 times my cow-orkers let me get away with it.

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kensmith@rahul.net   forging knowledge

In article , Active8 wrote: [...]

Lightly loaded R-R op-amps will swing within a few mV of the rail. I remember a cute app-note where a CMOS pair was used as the output of a r-r op-amp making it very good indeed.

I bet we could come up with a way to use two sections of the r-r op-amp and a couple of largish transistors to make an almost perfect r-r op-amp. If the supply voltage was more, I'd suggest MOSFETs. As it is a TIP-35 ad TIP-36 running in inverted mode may be just the ticket.

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kensmith@rahul.net   forging knowledge

Ok, thanks. The 3-opamp diff amp can be offset by injecting current into the shared gain resistor.

--+-----------------+--3V | | [8k2] [6k8] | _|_ e\| \_/ pnp|---------------+ /| | | _ | +Vbridge--------|+ \ | 10k 43k | | >----+------/\/\--+-/\/\--+ +----|-_/ | | | | | | | | | +-------/\/\--+ + | _ | \ 3k3 \ +|- \ | /68R 5k/Pot | >--+-Vout \ 3k3 \ +|+_/ +-------/\/\--+ + | | _ | | | +----|- \ | | | | | >----+------/\/\--+-/\/\--0V -Vbridge--------|+_/ | 10k 43k | | \| | npn|---------------+ e/| _|_ | \_/ | | [8k2] [6k8] | | --+----------------+--0V

The two transistors inject about 100uA through the 68R resistor. 100uA through 68R is 6.8mV. The two opamps are forced to adopt a reverse-offset in order bring things back again.

The 5k Pot adjusts the value of the injection current.

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Tony Williams.

Where can I find an example of this circuit?

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Best Regards,
Mike

In article , Active8 wrote: [...]

How much money do you have?

I haven't actually tried the TIP35 but I suspect that you could easily get to within 1mV of the rail at a few mA of load current. Using a transistor inverted like that gives a quite low saturation voltage.

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kensmith@rahul.net   forging knowledge

Use 1% resistors please. :) The OP posted 3 digit numbers.

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kensmith@rahul.net   forging knowledge

Tony Williams' circuit is an absolute best ( uninvert that output differential amp in his diagram). For something like this using a single INA122, available from DigiKey for $5.50 in unit quantity, to perform the whole reject/amplify process: View in a fixed-width font such as Courier.

Here's an ascii art example of the output portion of a bipolar one:

Vcc Vcc ! ! / ! \ ! / ! \ ! ! !/ PNP +----! NPN ! !\e !/ Vcc ! --! ! ! ! !\e / ! ! ! \ ! ! ! / ! A ! ! ! ! B -----+ +--+ +------- ! ! ! ! ! ! \ ! ! ! / ! ! ! \ ! ! ! / ! ! ! ! ! ! !/e GND ! --! ! !\ ! PNP ! !/ e +----! ! !\ NPN \ ! / ! \ ! / ! ! ! GND GND

There usually has to be a series RC from the point A to B and some local feedback at the driving op-map to prevent oscillations. The resistor fed emitters of the driver stage set the bias current of the output devices when we are in saturation.

The CMOS buffer version is much simpler but I don't think we can use it at only 3V:

-------/\/\/-------+-------- ! ! ----/\/\-+-!+\ !\ ! ! >---+-----! >O- ----/\/\-+-!-/ ! !/CMOS unbuffered inverter ! ! --!!----

The local feedback on the op-amp is needed if the op-amp is anything but the slowest type. The extra delay in the CMOS section will take you out of stability.

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kensmith@rahul.net   forging knowledge

You know, the fun thing is, one of the tasks I decided to do was simulate this thing, and see what helped. I got the latest INA122 spice model from TI/BB, and tried this. Finally figured out that none of the reference voltage changed did any good, got just about the same results every time, or results that didn't make any sense. Ralized that they modeled it as a single opamp, not as an instrumentation amp.

Finally, went to AD and got the AD627 model, and put that in. Got a great family of curves that do exactly what I want it to do.

Now I realized I don't have any matching PNP/NPN pairs in the junk box, just a pile of 2N2222's, so will have to run by RatShack later and pick some up.

BTW, is that a diode in the emitter bias circuit? Or something else....

Thanks for all the help! I figured an actual DESIGN question wouldn't be TOO off topic... 8-)

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Charlie
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Edmondson Engineering
Unique Solutions to Unusual Problems

Polarity of last stage swapped, as per Fred's correction.

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Tony Williams.

I wondered if you were talking about a current booster. This was the only way I could figure to do what you said.

>

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Best Regards,
Mike

It really doesn't need to boost current if it has a voltage gain a little over unity, the op-amps swing is less than the outputs. In this case there is a significant current boost along with the improved saturation voltage.

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kensmith@rahul.net   forging knowledge

They are diodes, compensating for the dVbe/dT of their respective transistors. Diode-connected transistors work slightly better, as below.

| | | +----+ \| | |/c npn1|--+--|npn2 e/| b |\e | | | | [8k2] [6k8] | | +--------+----

Connect npn2's base to collector.

Good thermal coupling is required to avoid drifts due to stray breezes. Mount the two transistors alongside each other and glue them together. A dollop of hot-melt glue over the pair is useful.

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Tony Williams.

Right- forget their dumb SPICE model. Throw the equivalent circuit into SPICE using ideal OA's, then do a DC sweep on Vdiff from say -15mV to

+15mV, stepping VCM as a parameter from 0.5V to 2.5V, and plot the two OA outputs. This will tell you how the INA122 will do.

On second thought, the transistor current source offset is not so good in this application for two reasons: 1) it is not ratiometric to the battery voltage, and 2) it takes a lot overhead ~ 1.3V to each rail which does not leave a lot of room for VCM variation- especially when you consider battery drain down. It is better to go with the INA122 followed by an OA with Vo=2(Vin-Vbatt/2) as in my original circuit- this is ratiometric and has no CM limitations. You can conserve current by going with a dual RRIO OA and using an inverted mode transistor like so:

View in a fixed-width font such as Courier.

gnd Vbatt | | INA122--------------+ | | RRIO + | |\ | +-R-+ V -------|--------|+\ | | | |\ in | | >---+--|-+-R-+------------|+\ | ,---|-/ | | | | >--+-> 0