Induction heater progress

The half bridge was working fine with the MOSFETs, so I wired up the IGBTs (4 x IRG4PC50UD) with 10 ohm gate resistors and 1/2" wide copper strip, soldered all neat, film bypass caps no more than an inch from the transistors, gate drive and power supply both function seperately, let's try them together... charge PSU caps (flick switch), turn on driver. Ping. Shit, I don't like that sound. The meter says zero volts on the caps. That was 60 joules (about 2mF at 250V), and the caps can probably deliver that in under 100us...way more than those junctions can handle... let's check it again... flick the switch, BURRZZZ, nope, it's f****ng shorted all-god-damn-right...

MOSFETs worked. What's wrong guys?

Tim

-- Deep Fryer: a very philosophical monk. Website:

formatting link

Reply to
Tim Williams
Loading thread data ...

What's wrong with starting out your testing at low supply voltages?

I was going to remind you that not all IGBTs have reverse diodes, but I see the IRG4PC50UD does. You aren't actually using IRG4PC50U are you?

--
 Thanks,
    - Win
Reply to
Winfield Hill

I did, for the MOSFETs. For sure I should've started with a resistor load and +100V, but then, IGBTs ought to be stocky enough, riiiight?...

Nope, clearly (well as clear as laser printing is x_x) UD type.

Tim

-- Deep Fryer: a very philosophical monk. Website:

formatting link

Reply to
Tim Williams

A scope to view some waveforms would help...

Rene

--
Ing.Buero R.Tschaggelar - http://www.ibrtses.com
& commercial newsgroups - http://www.talkto.net
Reply to
Rene Tschaggelar

Well, I've got some stuff like this:

formatting link
But that's with the MOSFETs. (Output current is probably like 20A.)

I can assure you it was working very nicely: 40-48% duty cycle per output,

Reply to
Tim Williams

Reply to
Winfield Hill

Hi, Tim -

I think the IGBTs have a long storage time relative to FETs. Also a longer turn off time. Is it possible that your dead time was adequate for the FETs but not for the IGBTs?

Good luck.

John

Reply to
John - KD5YI

even the so-called super- (or whatever superlative the mfg comes up with) fast IGBTs are as slow as a wet week cf FETs. its probably that which is the problem.

I like to configure my desat and current limit/trip circuits to latch during testing (usually not hard). and *always* bring it up nice and gentle. big bang testing usually results in exactly that.

if your desat circuit doesnt latch the fault, then you hjust repeatedly desat the IGBT, Tj ratchets up and *bang*

IGBTs *do not like* being over-voltaged, and *will* shit themselves if you do. very low inductance is required between the half-bridge and DC bus. FETs OTOH are far more tolerant (hell, they even have avalanche ratings). If an IGBT desats, the current is probably around 10x IGBT rated current (which is probably higher than the current you operate them at), so for same Toff, Lstray*dI/dt will give voltage drops about

10x bigger than during normal operation. thus it is quite common for desat circuits to force the IGBTs to blow up whilst attempting to protect them :) BTFT

some calcs:

Ipk = 20A*sqrt(2) = 30A (too lazy to pick up HP). IGBT = 50A, 600V Vdc = 400V Toff = 500ns (ignore tail current)

Vmargin = 200V = Lstray*dI/dt

Lstray < 200V*500ns/30A < 3.3uH

no worries you say.

alas, the important time is not the fall time, but how long the IGBT gate cruises thru the threshold region - roughly the width of the flat spot in Vgs. or you could measure the collector voltage rise time, the two ought to be fairly similar.

so lets say it fluffs around Vth for say 100ns. Then Lstray < 670nH. not so easy. Hell, there is 30nH just in the cap, another 30nH in the IGBT (oops, 2 in series, thats 60nH). so 100nH would be a damn fine trick (although do-able).

alas, during desat the current might rise as high as 500A, so dV will be

10x - 20x higher, so unless Lstray < 30 - 60nH, kaboom.

this is why real IGBTs come in extremely low inductance packages, drive manufacturers herniate themselves attempting to reduce L, and good gatedrives turn off much slower during fault conditions. Semkiron have a FET in series with the turn-off FET, that shunts a resistor. the desat circuit turns the lower FET off during a fault, so the extra resistor gets added to Rgoff, slowing the rise time.

cheers Terry

Reply to
Terry Given

Howso? Slow in general yes, but slow switching time relaxes the dI/dt requirement. I'm puttering along at 20kHz or so, so there are fewer transitions per second, not to mention no switching loss at turn-on (zero voltage/zero current). At any rate that would just cost me what, a percentage point in efficiency? Out of 98 or 99%? *Shrug*...fine with me.

Tim

-- Deep Fryer: a very philosophical monk. Website:

formatting link

Reply to
Tim Williams

I don't think so. These are rated for 300ns maximum turn off time (i.e., td

  • tf), which is still under a microsecond even with a very pokey drive circuit (I'm pretty sure mine does better, though I can't very well test it with full IGBT miller effect now..).

As a matter of fact, the desat light turned on, indicating the optos flipped the R-S f/f and the SG3524 turned off, turning off the drive, which should be all within 10us or so.

I should take a pic. (It would suck though, since I already removed the three shorted IGBTs.) I've got 10 film caps totally packed in where the copper strips are closest.

Which reminds me, wtf is an IGBT's Vce(max) anyways? Sure, it says it can handle 600V...what's it do at 601? Nothing? Depends? I also find it suspicious that there's no avalance rating...

Well what say ye of 4.5" of copper strip? (That's from end to end, the nearest IGBT's internal diode is of course closer, so as to anchor the flyback pulse.)

So International Rectifier didn't sell me "Real IGBTs"? For shame! S'posted all over the data sheet! ;o)

Ah, good idea.

Tim

-- Deep Fryer: a very philosophical monk. Website:

formatting link

Reply to
Tim Williams

perhaps. I once got some "hyper fast" IR igbts, rated for 150kHz, and they sucked major league canal water. IMO totally unusable above 20kHz or so. lies, damn lies, and shit mfgs put in datasheets. IR for example always spec Rdson at Tj = 25C, and their so-called power ratings are even bigger bollocks - its not uncommon to see a "maximum power" figure that is greater than Tjmax/Rtheta

I forget if your circuit latches the fault. if not, a diode should make it do so. as a general rule of thumb, the desat ought to turn the damn IGBT off by itself, then indicate thru an opto that all isnt well in the state of denmark. Note that Hamlets approach (piss around for ages) inevitably results in a high mortality rate :)

all my gatedrives do exactly that, and stay latched off until the main drive opto turns off (IOW the controller turns the igbt off), then reset themselves. the controller is then responsible for making sure it wont re-start the IGBT - it latches the fault, in a far more permanent sense.

even then, via the front panel, its possible to reset the fault, and try again. customers even did this often enough to ratchet up the die temperature until kaboom. for a 600A drive, 5-10 resets in quick succession would kill it ;) Later generations of product got real smart, running thermal models and having ever-increasing timeouts between allowing resets, spcifically to prevent this.

thats because they dont avalanche, they erupt :)

I cant really tell you what the max voltage is, but if you feel like sacrificing an IGBT, you can measure it - crank up Vce slowly, until the IGBT s**ts itself. normally its not much higher than the rated voltage. which is the voltage at the die, and therefore = bus voltage + LdI/dt.

its the total loop, dude. I cant see abse, but if you take a pic of the setup, with a ruler for scale, and post it (and email it to me) I'll tell you what Lbus is (roughly), and others will do likewise (or point out my crap calculations).

the general rule of thumb is: without a parallel-plate transmission line, forget it. double-sided copper-clad board is great for this job though, a sharp knife and a soldering iron allow you to make a suitable "pcb" that contains bus caps and IGBTs.

formatting link

thats a "real" IGBT - 6,500V 600A :)

Cheers Terry

Reply to
Terry Given

Yipe. Then, why hasn't someone sued them for falsified information?

Well, it kicks an R-S flip-flop, which can only be reset by a pushbutton wired to supply a couple-microsecond pulse to the reset pin.

Fair enough. Nonetheless, I tested the desat detection circuits and there's under 10us between a desat pulse and everything inbetween the gate itself (F/F, '3524, transformer (high side), driver).

again. customers even did this often enough to ratchet up the die

Heh heh. It would be nice if I had a 10Gohm resistor on hand, so that 2.7nF reset pulse generating capacitor can't charge too fast, but alas...

Sooo, it's more like an SCR? Once-per-IGBT-SCR? So what happens if I push

1mA CCSource into the collector, will voltage rise to ~600V then kill to 0 or 2V? Will it stabilize like a zener? How about 10mA? 100?

What if I make L go to shit, and make a shorting-commutating bridge? Izzat much safer for this stuff?

Well...yeah...fine... 4.5" each way (end to end), plus film caps in the middle, plus about 1/2" max. seperation between the strips.

Alright...

What significance is a TL at these edge rates? I'm not doing anything nanosecondey here.

If the goal is to add distributed capacitance to slow e.g. flyback pulses, wouldn't a small (say 0.047uF) cap at each IGBT be more effective? How about 10-20 spaced evenly along the strip?

Meh... there's a toob bigger ;o)

formatting link

Tim

-- Deep Fryer: a very philosophical monk. Website:

formatting link

Reply to
Tim Williams

lies, damned lies, and shit marketing people make up. read the data sheet very carefully.

over the last 2 years I've picked a lot of SO-8 substitute FETs. I do this by calculating Rdson at Tj = 125C. many mfgs dont give you this figure, they give you the 25C figure and have a scalar curve of Rdson-vs-Tj. these curves are different, too - so 2 FETs with the same Rdson at 25C may be quite different at 125C. I've seen scalars ranging from 1.4 - 1.7. I presume its a function of mfg process, perhaps some of the semiconductor theorists can explain why. I just know to look carefully.

jolly good.

OK, next question: how big is the IGBT die? can you dissolve the epoxy off one of the corpses, and measure it? then we can do a simple adiabatic heating calc to work out how much time you really have.

volume*density = mass,

mass*specific heat = J/K

pick some suitable dT (eg Tj = 200C is BAD, I use dT = 100C)

now you know how many joules it takes.

divide joules by desat power (bus volts*desat current)

voila, max. desat time.

hopefully Win or someone will step in and answer this - I cant. I have read some papers on this, but all I can remember is DONT DO IT.

the only igbts I have lying around are 600A 1200V parts, and I'm not willing to sacrifice them....

its just different. then you have the converse problem - turn all igbts off and kaboom.

philosophically, it is usually a bad idea to throw out an entire design when one runs into problems - the learning (lifetime) curve resets, and now you get to discover all the problems with the new design. far better to measure the amount of funny. As long as the basic topology isnt too unsuited to the task, the problems can usually be fixed.

that being said, sometimes the answer is to throw it out and start again, but IME thats not usually the case.

Although I have worked with a number of people who routinely do this (abandon entire designs) and their hardware is *always* in a state of "dodgy prototype". Never hire such people. If you do, fire them. the technical term is "idiot"

what you want to do is get, say, 1mm lexan, and place your strips on either side of that, with the lexan somewhat wider than the strips (clearance, 3-6mm ought to do). just like a 2-sided PCB.

I'll guess its 1mm thick, and 1" wide strip.

according to Terman, Radio Engineers Handbook, p.52:

l = 4.5" b = 1" c = (1/25.4)" D = 0.5" + 1"/2 + 1"/2 = 1.5"

L = 0.1016*l*[ln(D/(b+c)) + 1.5 - D/l + 0.2235*(b+c)/l) uH

{ 2.303*log() = ln() }

L = 0.1016*4.5*[0.36685 + 1.5 - 0.333 + 0.0516] uH L = 724nH

its pretty clear that strip thickness c does bugger all.

for 0.5" wide strip, b = 0.5" and D = 1" so L = 879nH

thats a lot.

the inductance of the film caps is also not negligible. it would be reasonable to slice the bus inductance into n identical sections, each feeding a cap then the next section. you could then quickly hack up a spice simulation, and measure the effective inductance seen looking into the end of the strip.

its fairly easy to measure the cap ESL, hell the mfg may even tell you the SRF. betcha its 10nH or more though, but probably < 30nH.

anytime in the next 8-12 seconds would be fine ;)

the next important thing is the half-bridge interconnects. the upper IGBT collector could (should) bolt directly to the +Vdc strip, but then you need to connect its emitter (luckily, this is a long skinny leg, so as to maximise its inductance) to the collector of the lower IGBT, whose emitter ought to connect directly to the -Vdc strip.

crazy thought:

bend upper E leg over top of case, solder wide strip to it (the folding will help cancel out the inductance). then sit lower IGBT on top of this, solder it up, and do a similar trick for its E, running the wide strip down to the -Vdc bus. best not to think about the heatsinking (until you realise that making the strip very thick does bugger all to L, in which case it morphs into a heat spreader/sink).

you can now see why I use multilayer structures (2mm Cu plates & lexan for big stuff, 10Oz pcb for little stuff, 1-4Oz pcb for toys).

with single powerex U-series IGBTs arranged as a half-bridge, there is another great trick. after you kill one, gut it. then you will see how the module internal bus-bars run - up one side of the module. Re-do your half-bridge layout such that the internal bus-bars of each IGBT are as close together as possible - IOW spin one IGBT 180 degrees. this minimises the total inductance. If not, you just placed the two internal bus bars 160mm apart (c.f. 5mm), thereby maximising the total inductance, and ensuring that in the event of a desat (and perhaps even during normal operation) kaboom :)

bloody low L. for a parallel plate transmission line, width b, separation a, L = Uo*b/a, Uo = 1.2566*uH/m (R,W,vD p.250 table 5.11b)

25.4mm wide, 1mm spacing, L = 50nH/m.

4.5" of this TL is 1.26nH, which pisses all over your 0.5" spaced strips, by almost 3 orders of magnitude :)

remember, a transmission line is a lumped circuit element for l < lambda/20 (ish), as in your case, and as you can see, its a damned good one!

yes. but the cap L must be low. if you use a 1" long film cap, it'll have quite high L. special "IGBT snubber" caps exist (often designed to bolt directly to the IGBT terminals) with inductances on the order of 1-2nH.

If you use a pcb, then you can plop down HV smt caps (dont hand-solder them lest they EXPLODE) which are dirt cheap, and have about 1nH ESL (it'll be at least a 1206 package, perhaps bigger).

beware smt film caps though - some (WIMA IIRC) are actually leaded caps, legs bent alongside body, and metal plates welded on. so the inductance is really no better than the leaded cap itself.

How

see above wrt inductance of each piece of strip.

I've got a paper somewhere (buried under huge pile of shit no doubt) where it is "proven" that valves always beat silicon at high enough power levels, cos they can get a lot hotter. roll on SiC.

Cheers Terry

Reply to
Terry Given

The thing about fast switching is this. If you're starting a load with no current, and use soft switching, fine. But if you have enough inductance and are running "continuous" current, as opposed to "dis-continuous" current, then soft switching can be a disaster. That's because the switch may be on enough to carry most of the load current, as enforced by the inductor, but not on enough to have low voltages across its terminals. The instantaneous power dissipation can be damaging, to say the least.

With respect to desat detection, there's a time delay for that to work, typically 5 to 10us, and this can be big trouble - it's just a matter of how high the dissipation is during this time. If the the IGBT is switching into a full short, or is carrying full load current, with high terminal voltages, this time can be too long.

Not to say these issues are necessarily related to your failure, but I do suggest a little more respect for their implications.

--
 Thanks,
    - Win
Reply to
Winfield Hill

Well, transistors just look like a CCS, so terminal voltage would certainly skyrocket with dissipation if Ic exceeds say, 100-200A.

I've got gate at 10V on-state, so that shouldn't be a problem. According to the 'data'sheet, that should be enough for 200A, and temperature makes no difference in this characteristic at that current. It neglects to mention Gm or threshold variation though. I don't like the idea of running it up to say, 15V, since it pops at a mere 20V (what dumb silicon burner makes Vg(max) ONLY +/-20V? sheesh), and if anything should pulse it a mere 5V, it's done for.

Tim

-- Deep Fryer: a very philosophical monk. Website:

formatting link

Reply to
Tim Williams

to

to

Greetings Tim.

Chances are the IGBT's gate dielectric is not nearly as vulnerable as you think. According to this app note by International Rectifier:

formatting link

Read section 8.2 (absolute maximum ratings) under the italicized title "Maximum Gate-to-Emitter Voltage (Vge)"

It claims typical gate dielectric rupture occurs around 80V (!!), but is limited to 20V for other reasons.

By running your gates at 10V you are probably risking more harm than good. They don't show part to part variation min/max graphs, so I'm not sure you can fully trust that all of your IGBT parts can handle 200A@10V Vge without dropping into the linear region.

Reply to
Fritz Schlunder

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.