Very good question. Here's my analysis of that...
No diodes: Assume the lower FET is on. The lower half of the primary will be neg on the bottom and pos on the tap. The upper half of the primary will have the same polarity induced into it by the field of the lower half, i.e., neg at the tap and +9v at the top. When you add the 9v at the tap already that would be 18v at the top.
With diodes: The 18v will be clamped to 0.7v above the tap, or 9.7v.
The diodes were put there to clamp any high voltage transients produced when the FETs switch.
OK... your question got me on to something. I just tried removing the diodes and sure enough, the drain voltages shot up to 150v spikes during switching. Luckily it didn't take out my FETs.
BUT - the output voltage of the doubler went from 5v to EIGHTEEN volts. This is with a 1.8k load. I changed the load to 820 ohms and had over 8 volts. That's 10ma at 8v! This is more than I need! Also, the DC current drain on the primary side went from 400ma down to 95ma.
To ease the burden on the FETs I then placed a capacitor from the drains to +9v (tried several values from .0047 to .047 -- not much effect there) and got the overshoot down to around 20-30v. Very acceptable.
So, Spehro, your question was the key that's gonna make this work. Thanks for your comments!
Now I'm going back to my original coreless design and work on that again -- with no damn diodes.