I've got a couple boards that use this method to level shift: The I2C master is 3.3V while all the slaves are 5V devices. This works fin e, except on the newest board. Only one of the (3 in this case) slaves res pond. Scoping the wave-forms and comparing with another board with the sam e circuit (different PCB layout, however) shows they are identical...until I noticed something odd: With the scope probes attached the new board works fine! Testing with a ba re finger instead of probe yields about an 80% success rate. The probe/fin ger must be at the node marked 'Master SDA', nowhere else has any effect. I'm only running at 100kHz. Can anybody enlighten me to what may be going on? Do I really need to hang a cap off a serial data line?? Feels like I'm missing something obvious here...

What's the rise/fall time of your signals like, when the master is driving them? Are your I2C lines terminated anywhere, or are they just traces/wires? If your master is hitting the lines with really fast edges, and if you don't have termination resistors installed at appropriate ppints, it's possible that the slave devices are seeing some ringing on the bus, and are mis-clocking.

Den tirsdag den 11. oktober 2016 kl. 02.42.47 UTC+2 skrev krw: yep, and if you have to find something 74HCT

I2C bus needs capacitance?

Oct 05, 2016 43 Replies

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rickman 9 years ago

I think when "intent" is mentioned, it gets away from the technical issues involved. You can have a poorer electrical environment on a PCB than you do on a ribbon cable. It depends on the details. I would not automatically preclude transferring data on by I2C this way. I'm sure it can work fine if handled correctly.

I know. But I think in this case it is not needed unless there is more he is not telling. I've never seen 5 volt logic that wouldn't work when driven from a 3.3 volt source... well, I shouldn't say "never", but it seems to work in the general case. Depends on the electrical specs of the devices or course.

The point is if he can't do anything about the 5 volt pullups, he can limit the voltage seen by the 3.3 volt device.

Rick C

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Dennis 9 years ago

The MAX7219 requires 3.5v min for a logic high. I tried 3.3v and it doesn't work. At least the data sheet specifies 3.5v so you can figure out why it doesn?t work :-).

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krw 9 years ago

s/correctly/carefully

Don't forget the ground returns and be carefully of the edge rates of other signals in the cable.

CMOS high is guaranteed at .7VDD. Even at nominal power supplies, that's 3.5V and even then you have no noise margin. At VDD(Max) you're even in worse shape. Even if it switches, you may get excessive DC shoot-through current from the gate. It is *not* a good plan to run 5V CMOS with a 3.3V signal.

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Lasse Langwadt Christensen 9 years ago

yep, and if you have to find something 74HCT

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