How to design this circuit?

Jan 18, 2005 22 Replies

In article , Tobias Weingartner wrote: [...]

You are in luck: I think it can all be done with pre-setting counters. You shouldn't really need a divide. What calculation did you intend to do?

The type-2 phase comparitor is the one you want.

-- kensmith@rahul.net forging knowledge

Well, let's say that I use a 16MHz clock, and count how many clock cycles each cycle of the input signal takes. When the encoder is moving slowly, it may be several thousands of the 16MHz clock. When the encoder is moving slower, it may only be a few hundred. I want to fire when a certain angular point is reached (down to a 0.1 degree resolution). Note that the angular firing position is not static either, it maybe 36.4 degrees one time, and

37.1 degrees the next time around.
[100~Plax]sb16i0A2172656B63616820636420726568746F6E61207473754A[dZ1!=b]salax

I think a PLL of sorts is the way I'm going to go. Right now I'm investigating FPGA and digital PLL's. Thank you guys for pointing me in the right direction. :-)

[100~Plax]sb16i0A2172656B63616820636420726568746F6E61207473754A[dZ1!=b]salax

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