how to choose the best FET to detect weak e-field?

The instant you connect gate to drain (a mechanical circuit closes in under 1ns, by the way, so it does make a reasonable impulse), current flows into the gate capacitance. Some will flow out of the drain's (assuming the transistor was off first), as well as the source (which in this example is a harmless resistor and LED). As the gate charges, drain voltage falls. Within a few ns, charge is equalized and Vg = Vd == Vgs(th).

There might be some hazard running such a circuit from a supply over 40V, where the drain charge may be sufficient to cause dangerous gate transients before the entire gate charges (a process limited by gate spreading resistance). Note I say this with some confidence while recognizing Vgs(max) is only 20V (or is it 30V on the 2N7002?).

What you don't want to do is touch the gate after scuffing your feet on the carpet. Which John never recommended, and I certainly don't either!

As for general purposes, uncommitted pins are generally a hazard, so you don't want to leave things floating. Sometimes this has real consequences (floating CMOS inputs are constrained by the input diodes, but otherwise free inbetween; around the midpoint, the input stage goes class A and supply current increases dramatically). Other times, it doesn't so much (John's FET-resistor-LED will stay where it was more or less, and drift is simply part of the experiment). But general advice is to avoid undefined voltages anywhere, be they in circuit, on components (like unused gates) or PCBs (I hate it when copper pours add those damn floating patches without checking for vias to them!).

Tim

"Cheeeese Gromet"

(Shaking hands)

George H.

.highlandtechnology.com  jlarkin at highlandtechnology dot com

#snip#

Not to contradict you at all... but there's one neat specific example of a counterexample to this which is rather fun to look at. Take a look at "Frankenstein's Dosimeter" at

This uses a JFET with its gate connected to nothing other than a piece of wire, which is suspended (well-insulated) in the middle of an air-filled metal chamber. The chamber walls are charged up to 50 VDC with respect to the ground reference in the circuit.

Tiny amounts of current flow within the chamber (due to ionization of the air by gamma radiation, mostly) and the positive ions reaching the wire gradually pull the gate upwards in voltage. At some point, the JFET conducts enough to trigger a one-shot, which generates a pulse and also pulls the JFET drain down to ground... and this discharges the gate down to near ground (via the drain), and the circuit resets.

The current leakage is strongly proportional to the amount of radiation impinging on the chamber, and thus the number of pulses per time give you a reasonable estimate of your radiation exposure level.

I've gotta throw one of these together one of these days, just for the fun of it.

I've

rs

s...

Ouch, I'm never exactly right. (Grin :^) My daughter is taking some science class (8th grade) She told me her teacher was interested in weather science, and I said we should build a field mill. So we've recently been looking at web pages. I've been to the second link. If I can carve out some time to work on it, maybe I can hit you up for ideas on how to improve the front end.

George H.

I have done a lot of pawing on this circuit (the one on the Wallace&Grommit mouse pad), with body charge and such, and haven't blown a gate yet. Most mosfets die at roughly 75 volts on the gate.

Of course, my little thing wasn't grounded, so there's nothing for a good zap to work against. But it's just a toy, and the fets cost 3 cents.

We had one board with a uP (68332) input floating. It was the external memory-access handshake pin, which shouldn't have mattered since were were using internal chip select timings. It ran fine until you put your hand a few inches from the uP, then all the software slowed down about 10:1... every EPROM access timed out at about 20 micrseconds. The VF display scan got very weird, about 5 characters per second instead of 50.

That's quite fine -- generalities are meant to have specific exceptions. :)

Would be more accurate to say: "avoid unintended open circuits", since in low-leakage stuff, like this circuit, the signal of interest is more-or-less indistinguishable from an "open circuit". But it's intended, which makes it all okay. ;-)

Tim