How do I make a seperate analog and digital ground?

"Ken Smith" a écrit dans le message de news:cs0r3v$l2p$ snipped-for-privacy@blue.rahul.net...

Pfff... What about 16 millions gain at 100kHz ?

I'm not to sure about the robustness of SigmaDelta ADCs. The point is the comparator inside the ADC. It doesn't have a common mode rejection that extends too far into the MHz.

These 100mVpp you measure at 600kHz are 100mV pulses of 1.5ns, and they can make your ADC measure a constant 100mV offset on top of your signal. As soon as you need more than say 8bit at 5V, your readings are to be influenced by the mentioned noise. This is especially ugly when you have one of those 20 to 24bit ADC that could produce many more bits. I had a application where with a lot of ferrites, we were able to reduce these spikes down to 5 mV or so, and the ADC were just 5mV off. However some were tracking the signal minus 5mV while others had the signal plus 5mV. This is ugly and rather hard to communicate. It was the management that insisted on having switchers there ...

Sometimes marketing overrules.

Rene

Sure.

Rene

In article , John Woodgate wrote: [...]

Its the dI/dt in the triac that determines the high frequencies so I'd expect the spectrum from it to look nearly identical up at the high frequencies. There is usually some EMI circuitry but I doubt that the

In most delta mod designs I've seen, the comparitor is effectively after a low pass filter. This makes them more robust against noise on their input. You don't need a sample an hold on a delta.

Go back and re-read the above more carefully. I said "100mV of 600KHz". Its not spikes; its sine waves. I was making the point that you have to deal with all of the frequencies.

I almost never need that few bits in the measurement the systems make. The lowest of late has been 24 bits. When you get out to that number of bits, extreme measures become the rule.

A now retired sales guy was famous for his E = MC^3 suggestions.

In article , Larry Brasfield wrote: [...]

Yes both suggestions are of the "normally" type. He isn't ruling out design situations that override his suggestioned rules.

This is why I don't pass single-ended analog signals across ground splits.

Also people who just slap down one continuous plain and assume it is all at the same voltage don't consider the coupling either. A lot of ignoring the issues is gotten away with in digital and low resolution analog circuits.

You have that exactly backwards. When wide dynamic range is involved at low frequencies, the resistive drops due to logic gate currents can be bigger than your signal.

In one design we had to split a CMOS counter into two chips instead of one with more bits in it. In the prototype PCB, the ground current from the upper bits effected the timing of the lower bits enough to make too much jitter in the reference clock feeding a clock interpolator.

The signals I deal with are under 300KHz. Many are less than 4KHz. High resolution low frequency circuits are their own science.

BW = about 200Hz

I read in sci.electronics.design that Ken Smith wrote (in ) about 'How do I make a seperate analog and digital ground?', on Tue, 11 Jan 2005:

That's about the square root of exotic, then. (;-)

I make it exotic^0.63881