Greetings:
I came up with a real simple way to clamp an op-amp integrator that you folks probably tried already. For clamping the negative swing for instance, connect NPN emitter to opamp output, base to the desired clamp voltage +0.6V (so to clamp at -10V, base goes to -9.4V through a resistor). Collector goes to the opamp inverting input.
When the integrator swings to -10V, the NPN turns on, bypassing current around the integrating capacitor preventing it from charging further.
Do a similar thing with a PNP to clamp the positive swing. It works!
The trouble is, for an integrator that can swing (after clamping) over a fairly wide range, say +-10V, then the EB junctions of the transistors get reverse biased beyond their ratings.
Should I try to find transistors with higher Vbr(ebo) ratings, or find another integrator limiting method? (Please don't suggest another specific method yet!)
Thanks for input.
Good day!