High ^%$( resolution

...and then you have one of your flunkies "enter them on a screen".

Reply to
krw
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incorrect, idiotic & childish

Reply to
tabbypurr

I have a guy who does PCB layouts and Autocad and Solidworks. Yes, he CADs my schematics. And does mechanical designs based on sketches.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

Can anyone follow this post? Has Jan gone completely off the deep end finally?

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Rick
Reply to
rickman

Are you counting his time and effort in the "nicer and faster"? I know I'm a lot more productive in front of a schematic entry tool than with paper and pencil (though I have them for notes and doodles). It's hard to insert a stage on a piece of paper.

Reply to
krw

Sounds like you should apply fo the job. ;)

Cheers

Phil 'also a vellum enthusiast' Hobbs

Reply to
Phil Hobbs

I'm far more productive at circuit design on paper than on a screen. The ratio must be around 4:1. If I have to wait for a new library part to be created, it might be 40:1.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

JL couldn't afford me. ;-)

Reply to
krw

When I worked with OrCAD, I made my own schematic symbols, then had the librarian/layout guy do the footprint for it at his leisure. I could then have several symbols for the same part, depending on how it was used. I do have to wait for the symbols to be made now but I rarely wait for them. I generally know what new parts I'll need well before I do the schematic.

Reply to
krw

We have a formal procedure for creating new parts. We create the schematic symbol, the pcb footprint, and the purchasing requirements all at once. It all gets done the same way and all gets checked. We do not allow engineers to do a convenient part of the process.

I sign all the forms that create new parts, and sometimes I have issues. Do we really need another part? Does the schematic symbol look right? How many should we stock? Is it a Maxim part?

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John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

Nice. That would tend to discourage the typical approach of engineers to want to use the very latest (and most unproven) chip for every new design.

I think some parts should have a file kept on them - to have corporate (or even personal) memory of their entertaining quirks.

--sp

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Best regards,  
Spehro Pefhany 
Amazon link for AoE 3rd Edition:            http://tinyurl.com/ntrpwu8 
Microchip link for 2015 Masters in Phoenix: http://tinyurl.com/l7g2k48
Reply to
Spehro Pefhany

Right. We have zillions of regulators and opamps and ADCs and stuff already.

Our material control system, MAX, allows a "pdata" folder for every part in stock. That includes the data sheets, photos, any private notes or measurements, purchasing notes, warnings, stuff like that. Not every 0603 resistor has a pdata folder, but most ICs and connectors and novel r/c/l parts do. The pdata folders are public, so anybody can add stuff. We have about 6500 different parts, and around

1500 pdata folders.
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John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

The symbols get checked before they're entered in the master library but that doesn't mean I can't create local ones while the librarian is doing his thing.

We're talking about schematic symbols, not parts. At the CPoE, we're forced to have a 1:1 correlation between them but it's *rally* limiting. The first to generate the part gets to decide how it'll look forever, unless someone else from another division changes it on you (and then all hell breaks loose with your schematics). There is no real reason for the 1:1 correspondence and it seriously hinders the designer.

Reply to
krw

So you can have multiple schematic symbols for one part?

We don't find that using a common schematic symbol is a big burden. We do sometimes flip an opamp such that V+ is on the bottom and V- is on top, but we always check that we have the power supplies connected right.

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John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

Not at the CPoE, but there is no reason it can't be done. OrCAD made it a simple matter to do. I suspect OrCAD isn't unique.

It's almost essential for very large parts like SOCs, if you want readable schematics. I like to lay out symbols for things like power supplies so the function of the part is obvious, too. At the CPoE, I'f forced to have small parts look like the physical package, though. The exceptions are opamps and gates (these can look either way). Most of my colleagues schematics are completely unreadable and don't see a problem with creating unreadable pages. They don't have a problem stealing mine, though. ;-)

Reply to
krw

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