Fun with GaN fets

Yeah, should be able to swap D and S and get inverted gain.

Tim

-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website:

And there is no substrate diode.

ISTR - I may be wrong, it has been known - but that diode is merely a parasitic one (and unavoidable) is it not?

Think of it as an enhancement mode JFET, though with asymmetrical drain and source ratings (inverted Vdg ~ 6V).

Presumably that asymmetry also affects the transfer curve. JL can measure it (but I would not expect the SPICE model to be that detailed, _measure_ not simulate).

Tim

I'm verifying both the EPC GaN and Cree SiC models by experiment, so that I can trust my system simulations. The biggest error that I've found, so far, is the Cree substrate diode model.

And of course, the GaNs don't have substrate diodes. The EPC Spice model does seem to be fairly accurate so far.

The GaNs are not avalanche rated, and I don't know what happens as the drain voltage goes up. I guess I'll sacrifice a couple of my cute little tile boards to find out.