Toying around with a circuit for a prospect. I love LT Spice.
This circuit is designed per the design rules promulgated by Roy Llewelyn and Doug DeMaw, to wit, to keep the tank impedance around 100-300 ohms and to design the circuit so that the active element never, ever saturates.
C1, C2, C4 and L1 define the tank circuit, with values chosen so that the impedance of the coil is about 100 ohms.
R2 and R3 hold the transistor base at about 3V, which lets R1 set the average standing current at about 500uA.
C3 shorts out the base bias network, to keep the loading minimal. It's where it is because that keeps it from needing to participate in the tank circuit to any great degree -- the only AC current it needs to absorb is out of band from the oscillator.
C4 forms a voltage divider in conjunction with C1 and C2, so that the output does not load the tank (much). R4 simulates the load of a following stage. C4 can be made bigger to load the tank circuit less, at the expense of lower voltage out.
With the values chosen, I get a nice clean output, without Ve ever rising enough to saturate the transistor. Starting is prompt at all temperatures simulated.
Now, if reality does its job and matches the simulation, I'll really be happy! (It often does with LT Spice, particularly at these low frequencies).
Version 4 SHEET 1 880 680 WIRE 384 80 -160 80 WIRE 384 112 384 80 WIRE -160 160 -160 80 WIRE -160 160 -400 160 WIRE 144 160 -16 160 WIRE 320 160 144 160 WIRE 144 192 144 160 WIRE -160 240 -160 160 WIRE -16 240 -16 160 WIRE 144 272 144 256 WIRE 272 272 144 272 WIRE 384 272 384 208 WIRE 384 272 272 272 WIRE 384 288 384 272 WIRE 144 304 144 272 WIRE -400 320 -400 160 WIRE -160 384 -160 320 WIRE -48 384 -160 384 WIRE -16 384 -16 320 WIRE -16 384 -48 384 WIRE 32 384 -16 384 WIRE 144 384 144 368 WIRE 144 384 96 384 WIRE 144 416 144 384 WIRE 496 416 144 416 WIRE 528 416 496 416 WIRE -160 432 -160 384 WIRE 496 432 496 416 WIRE -48 448 -48 384 WIRE -400 544 -400 400 WIRE -160 544 -160 512 WIRE -48 544 -48 512 WIRE 384 544 384 368 WIRE 496 544 496 512 FLAG -400 544 0 FLAG -160 544 0 FLAG -48 544 0 FLAG 384 544 0 FLAG 496 544 0 FLAG 272 272 Ve FLAG 528 416 Vout SYMBOL npn 320 112 R0 SYMATTR InstName Q1 SYMATTR Value 2N3904 SYMBOL cap 128 192 R0 SYMATTR InstName C1 SYMATTR Value 47n SYMBOL cap 128 304 R0 SYMATTR InstName C2 SYMATTR Value 12n SYMBOL cap -64 448 R0 SYMATTR InstName C3 SYMATTR Value 1µ SYMBOL ind -32 224 R0 SYMATTR InstName L1 SYMATTR Value 100µ SYMATTR SpiceLine Rser=2 SYMBOL res 368 272 R0 SYMATTR InstName R1 SYMATTR Value 4.7k SYMBOL res -176 224 R0 SYMATTR InstName R2 SYMATTR Value 33k SYMBOL res -176 416 R0 SYMATTR InstName R3 SYMATTR Value 10k SYMBOL voltage -400 304 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value 12 SYMBOL cap 96 368 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C4 SYMATTR Value 100n SYMBOL res 480 416 R0 SYMATTR InstName R4 SYMATTR Value 100 TEXT -754 496 Left 2 !.tran 5m TEXT -752 528 Left 2 !.step temp -25 50 25