We're experimenting with heat sinking an Altera Cyclone 3 FPGA. To measure actual die temperature, we built a 19-stage ring oscillator, followed by a divide-by-16 ripple counter, and brought that out.
The heat source is the FPGA itself: we just clocked every available flop on the chip at 250 MHz. We stuck a thinfilm thermocouple on the top of the BGA package, and here's what we got:
We can now use that curve (line, actually!) to evaluate various heat sinking options, for both this chip and the entire board.
The equivalent prop delay per CLB seems to be about 350 ps. The prop delay slope is about 0.1% per degree C.