Formula for minimum drive current for mosfet

I just don't see how that's possible unless your input drive was so blindingly fast and there were enough parasitics to avalanche a BE junction at a transition. Ordinarily there can be no crossconduction when the forward BE voltage on the one transistor is a cut-off reverse BE bias for the other...

What in the world is all that, and why all that gate capacitance:

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I haven't tried to use that totem pole myself, but I remember reading a comment somewhere by somebody that used two such totem poles in an H- bridge setup to drive a motor and said he had to use base resistors to avoid problems. The writer evinced some mystification as to why it should be so, but empirics rule! Fred is correct that in principle, you can't bias both transistors on simultaneously in that topology. Something else happened. Perhaps the transistors oscillated, and some parasitic effect may made it even worse. Base resistors would damp that. I think a little capacitance between base and collector will help tame high-strung behaviour as well.

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As for the question of what frequency to use, you don't need a formula. You have set a minimum of 20 kHz because it would make noise below that. Going higher will just dissipate more power, so use

20kHz.

If you find the uC is not enough and you have to use a driver chip, consider using a "high-low" or "half bridge" driver for two n-channel devices instead of the fairchild dual p and n. There are lots of such drivers available, and many incorporate deadtime to prevent cross- conduction. The only such chip I ever used was the IR2153, but you should look for the best one for your application. Besides avoiding the cross-conduction thing, you'll get more bang for the buck from n-channel mosfets. Here are a couple of links to those drivers.

"Fred Bloggs" wrote in message news: snipped-for-privacy@nospam.com...

[snip LTspice]

This developed from my problems with a fairly simple boost converter using a UC1843a driving a fairly large MOSFET. The FQP24N08 I originally used seemed to get too hot, and I thought it might be the 0.06 ohm RdsOn, so I used a beast MOSFET HUF75645 with 0.014 ohms. It drew more primary current and got hotter, so I assumed it was slow transition of drive voltage because of the 3800 pF gate capacitance, so I added a driver, and that seemed to fix it. Then I tried some ideas for a simple gate driver, and it became not so simple.

But the LTspice simulations did not show that much higher dissipation with fairly slow transitions (up to about 1 uSec), which I was simulating with high values of series resistance and gate capacitance. I don't have exact models of the two transistors I used. I'm still a bit stumped as to why the UC1843a doesn't work well enough for the FQP24N08.

I tried the simple NPN/PNP emitter follower gate driver because it seemed to work OK in LTspice, and it would be cheap and simple to add to the circuit. But the simulation was with 2N3904 and 2N3906, while I used an MPSA06 and an MJE170 (which I have lots of). The drive signal was directly from the gate driver of the UC1843a, which has a rise/fall time of 50 nSec into 1000 pF, and probably 10 nSec into just the bases, so it was probably fast enough to cause cross-conduction, especially with the mismatch of the transistors. Probably it would have been OK with a 20 ohm limiting resistor and a 10 nF capacitor as a supply, or maybe by adding base resistance.

The LTSpice ASC for the simple driver follows:

Paul

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Version 4 SHEET 1 1172 680 WIRE -32 -144 -192 -144 WIRE 384 -144 -32 -144 WIRE 768 -144 384 -144 WIRE 384 -48 384 -144 WIRE -192 0 -192 -144 WIRE 320 0 224 0 WIRE 768 0 768 -64 WIRE 832 0 768 0 WIRE -32 16 -32 -144 WIRE 384 80 384 48 WIRE 480 80 384 80 WIRE 512 80 480 80 WIRE 640 80 640 -16 WIRE 640 80 592 80 WIRE 656 80 640 80 WIRE 720 80 656 80 WIRE 384 112 384 80 WIRE -80 160 -112 160 WIRE 0 160 -80 160 WIRE 224 160 224 0 WIRE 224 160 80 160 WIRE 320 160 320 0 WIRE 656 160 656 80 WIRE -192 304 -192 80 WIRE -112 304 -112 240 WIRE -112 304 -192 304 WIRE -32 304 -32 80 WIRE -32 304 -112 304 WIRE 224 304 -32 304 WIRE 384 304 384 208 WIRE 384 304 224 304 WIRE 656 304 656 224 WIRE 656 304 384 304 WIRE 768 304 768 96 WIRE 768 304 656 304 WIRE 224 320 224 304 FLAG 224 320 0 FLAG 832 0 Vsw FLAG 640 -16 Vg FLAG -80 160 Vin FLAG 480 80 Vdrv SYMBOL voltage -112 144 R0 WINDOW 0 37 59 Left 0 WINDOW 3 -109 182 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PULSE(0 12 10u 10n 10n 5u 10u 1000) SYMBOL pnp 320 208 M180 WINDOW 0 49 26 Left 0 WINDOW 3 38 52 Left 0 SYMATTR InstName Q2 SYMATTR Value 2N4403 SYMBOL res 96 144 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R1 SYMATTR Value 10 SYMBOL res 496 96 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 0 56 VBottom 0 SYMATTR InstName R5 SYMATTR Value 1 SYMBOL voltage -192 -16 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value 15 SYMBOL nmos 720 0 R0 SYMATTR InstName M1 SYMATTR Value STB120NF10 SYMBOL res 752 -160 R0 SYMATTR InstName R6 SYMATTR Value 2 SYMBOL npn 320 -48 R0 SYMATTR InstName Q3 SYMATTR Value 2N3904 SYMBOL cap -48 16 R0 SYMATTR InstName C2 SYMATTR Value 1µ SYMBOL cap 640 160 R0 SYMATTR InstName C3 SYMATTR Value 3800p TEXT -224 504 Left 0 !.tran 1m startup

Ok, I finally found the equations. All my calculations say that the switching power is negliable compared to the power dissipated by R_ON. (Only at high frequencies does it start becoming significant)

P = I^2*R + 2*a*V*I*t*F

which can be rewritten as

P = I^2*R + 2*a*V*Q*F

and a depends on the load type(1/2 for inductive and 1/6 for resistive)

So infact for my case I need only like 200mA to switch the load fast enough for 50khz(so like 99% of the square waveform is constant).

There is charge storage in the base, so you get cross conduction if switched fast.

The datasheet for the National LM5022 has a good discussion of the various losses for a switching regulator, which can also be applied to your case. I modified their formulas for a more generalized case.

Conduction losses are determined by RdsOn as:

Pc = D * ( Id^2 * RdsOn * 1.3 ) where D is duty cycle, Id is RMS drain current during conduction, and the 1.3 factor is for heating effect on RdsOn.

Switching losses are:

Psw = 0.5 * Vg * Id * fsw * (tr + tf) , where Vg is gate voltage, Id is drain current, tr is rise time, tf is fall time, and fsw is switching frequency.

I found that, at 100 kHz, with a 42 watt load, switching loss can be as high as 2.3 watts even with a 6 amp driver with an FQP90N08, and about 0.43 watts with a 0.5 amp driver with STP35NF10, and 1.3 watts with a 0.2 amp driver. A lot depends on the actual switching time of the MOSFET. I was surprised that the FQP90N08 has 730 nSec rise and 330 nSec fall, so even a

0.5 amp driver only brings the losses up to 3 watts. The conduction losses are usually more than Psw, but not always.

I made an Excel spreadsheet that calculates various losses for a typical boost regulator. It may not be perfect, but it gives a pretty good idea, I think. LTspice is probably better, but this is faster. You are welcome to try it:

Good luck,

Paul

----------You mean drain voltage of course, not gate voltage.

Well, yes, that does make more sense. The gate voltage is only for computing gate drive power. Actually I think the formula should be:

Psw = 0.25 * Vd * Id * fsw * (tr + tf)

The maximum power will be at 1/2 V and 1/2 I. The power during the transition might be half again that amount. I'll have to look at that and maybe try a simulation. But the above formula gives me values that make sense.

In my case, gate voltage and starting drain voltage are both 12 volts, but the final output voltage is about 50 volts. When the MOSFET switches ON, the drain is at that voltage, so maybe it makes more sense to use that value. The LM5022 datasheet uses Vin for the calculation. That will make a big difference!

Updated:

Paul