Hi All, We are designing RTLs for SD domain.How to find out FIFO full,FIFO empty conditions when write pointer and read pointer are coming from different clock domains?Give me all the possible methods to find it out. Help me soon. Thank you, praba.
Using a (double) buffer at the output or input is probably the easiest (and reliable) solution. In this way the entire fifo can run at its own frequency. The (double) buffer is the seperation point between the clock domains.
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