Sure. It is rated as such. It should be fast enough as a prescaler for an FPGA. For even faster clockrates, there is the MC12095 doing div_2 and div_4 at 2.5GHz, or the NBGS53 doing div_2 at 10GHz.
Rene
Fastest counter?
Jun 02, 2006
25 Replies
How good is the signal to noise on your wave?
I assume you plan to start your counter on the positive zero crossing of your wave (or some other point), and stop it on the next positive zero crossing. I can't be bothered to do the maths now, but it wont take much noise to cause a significant error if you are hoping to get better than 0.05% resolution.
Gareth
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You could design it to clear the prescaler counter before the counting interval, and then after that, bit-bang out a substitue clock and detect at what count the prescaler overflowed.
Mark Zenier snipped-for-privacy@eskimo.com Googleproofaddress(account:mzenier provider:eskimo domain:com)
There's also the third option of a PLL multiplier at low frequencies.
Many thanks,
Don Lancaster voice phone: (928)428-4073
Synergetics 3860 West First Street Box 809 Thatcher, AZ 85552
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Recently I looked at using a small Altera MAX3000A series CPLD (I think it was an EPM3064A) for high-speed counting. I fit a fairly wide counter with some fancy enables (to sync with a reference clock) plus a serial shift register (to read the output with a microcontroller) with an Fmax of just over 200MHz.
Ben Jackson
http://www.ben.com/
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