Dusty pics

Aug 28, 2026 Last reply: 10 hours ago 3 Replies

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john larkin 15 hours ago

I always forget about dust whan I take a pic. Somehow I don't notice it in real life first. So I have to brush the dust off and start again.

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and it was really hard to keep the probe tip and the ground spring on the board with one hand and hit a key on the laptop with the other.

That Rigol fet probe is OK electrically but nasty mechanically.

The signal is from an Efinix T20 FPGA, through a bunch of traces and a ribbon cable. We tuned the drive strength and speed as best guesses. Looks pretty good. The next step of drive strength might be a bit nicer, but this is pretty good.

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John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

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Phil Hobbs 12 hours ago

Pretty good for a messy link like that. The flat spot halfway up might be a problem with longer links.

Or maybe you’re measuring the near end and it’s fine at the far end.

We use a lot of U.FL connectors for that sort of thing.

Cheers

Phil Hobbs

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john larkin 11 hours ago

That's the far end, on the baby board at the ribbon cable connector. If we need it, we put a TinyLogic receiver/buffer right there. Source terminated by the FPGA i/o cell.

The ribbon cable pinout alternates a number of fast signals with equivalent grounds. That seems to be about 75 ohms by TDR, so the PCB traces are 75 too. Looks pretty good, but a harder FPGA drive strength might crisp it up a bit. Gotta try that.

Hey, I just received the AoE X-chapters rev 2 book. I think I ordered it about 6 months ago.

We hate U.FL connectors!

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Phil Hobbs 10 hours ago

Mine got here yesterday. Looks good so far, though I’m way too flattened with lawyering to sit down with it yet.

I know. Weird.

A little flick of the wrist and they go on or off, zilch capacitance, 6 GHz, size of a SOT23, all for 30 cents or so. We sprinkle them all over the place for debug, then leave them mostly unpopulated.

Good Medicine, as long as you don’t have to make the cables!

Cheers

Phil Hobbs

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