We've had - so far - 100% success with pre-assigning the pins on Xilinx chips to optimize pcb layout. But the fastest we've clocked is
77 MHz, and that's not screaming these days.
That makes me shiver just to think about it. What needs such density? And how much does such a bare board cost?
100 layers must have interesting impedance and signal-quality issues. How thick?
Only rarely, in a critical timing bit, usually to meet pin-pin prop delay requirements, not to get it to work as such. But usually we play with the design (pipelining, logic depth, fanouts) to get the speed we need.
I did 200MHz in a Virtex-E assigning pins to optimize the PCB (I/Os directly adjacent to the driving/driven chip). I figured that the PCB timing was a worse problem than the FPGA routing resources. ..besides, I had to start somewhere. ;-)
'90s mainframe processor and channel boards.
I never saw the costs, and would be suspect of any costs I did see. The widget they're going in sold for upwards of $25M (six or eight processors, with all the chrome and channels ;.
I don't remember the thickness. I only worked on one side. ;-) Impedance was very tightly controlled though. High speed board-to- board wiring was either done in Gore-Tex trilead (G-S-G sort of twinlead) or coax. ...all 80ohm, IIRC.
That's I/Os. How about the logic inside? ;-) I loan myself out to the timing group sometimes when I have less to do than I want. The design is done, "your job, should you choose to accept" is to defy the synthesis tools and make timing, using nothing but bubblegum and fence wire.
They still are, except the complication has moved somewhat from density (that goes on the chips) to timing and skew analysis. With busses humping along at 1GHz (in consumer products, even), there isn't much slop thrown in for these things. I'm amazed that PCs work at all.
Who knows, maybe that is the reason why Capture supposedly costs more than $1700 now. I paid $495 for my license a long time ago. That was a good deal but more than $1000 just for drawing schematics? Nah.
If you stick at 0.062 overall thickness, at around 10 layers the dielectrics get so thin that the impedance of a 8 mil trace starts to get unusably low. So you have to bail from FR-4 and use something with lower dielectric constant. And then the cost queues up for takeoff.
A lot of layouters seem to use that as well. But when I saw PADS2004 starting at $3,495 I passed on it. Even the full blown Eagle pro package costs only fraction of that and has plenty of horse power.
I read in sci.electronics.design that Joerg wrote (in ) about 'Eagle vs Protel', on Wed, 17 Aug 2005:
Let's hope the drivers do the same!
--
Regards, John Woodgate, OOO - Own Opinions Only.
There are two sides to every question, except
\'What is a Moebius strip?\'
http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk
Probably you'd need someone on the other side if you want to install a thru-hole part. "Can see it, push some more, yep, coming though". Then fire up the blow torch to preheat the rather long via.
That looks like some gvt project where cost is less of an objective or maybe some scientists had to live their dream ;-)
You can't understand engineering. That fact is as plain as the dick on your face.
Crap, I did an 8x11" ten-layer "PCI" card (.062 thick). It was over-sized because it didn't all fit on the table. It also needed to stick out of the frame because it was a test system (replacing DUTS inside the server system would be a PITA)). The vendor (Sanmina SCI, now) had no issues with any of the manufacturing or impedance control. PCBs are nothign new.
Nope. The .062" card I did five years ago had three 50ohm layers, two 75 ohm, and five power. Though the traces were 6x6mil (IIRC), there wasn't a single problem. The high-speed (200MHz) stuff was all confined to the inner planes, with no vias except at the B/FGAs.
It really isn't all that bad, given a real manufacturing partner. The only thing they screwed up was the impedance on the LVPECL clock lines. They forgot the difference between differential impedance and single-ended. A quick substitution of a few terminators (which they covered) made the problems go away. It wasn't a product, so...
On Wed, 17 Aug 2005 00:43:28 GMT, Joerg wrote in Msg.
What annoys me is that Eagle doesn't have a central package repository. I.e., every library drags around its own version of a SO16 package, and if you want to change something you have to do it in all the lbrs.
I created my own "central" package repository from which I drag everything into the individual libraries, but that's just what it is -- a drag.
That said, Eagle is one of the most stable and reliable pieces of GUI software I've ever dealt with.
OrCad used to have that but this can create more problems than desirable. You modify a part and suddenly some of the old schematics don't work anymore because they pick from that repositoiry when loading. I like Eagle's approach better and IIRC OrCad is now similar in that respect. In the end the library has to be part of the schematic.
I do have a few quirks with it. Often it won't print. Nada, zilch, no error message, nothing. Then you have to either reload or deselect-select the printer and (sometimes) it decides that it will now print.
Haven't had it crash yet like Ban did. But that doesn't mean it couldn't happen here as well. So I do save every few minutes.
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