divide by 25/16

aha yes that would do, many thanks, shld be able to do in 2 chips a 74'390 dual decade counter and a 74'00.

I had written down the numbers in base 5, and had a big page of possible sequences looking for easy decodes, I think I just about had this sequence but didnt see the wood for the trees and overlooked its simplicity, im impresed at ariving at this so quickly :)

Colin =^.^=

Reply to
colin
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You could do two of them with a 74LS04, a 74LS11, and two 4017's. Invert O4 and O9 from a 4017, into two inputs of a 3-input And, gating the third input. There might well be some simpler way...

-jiw

Reply to
James Waldby

There is a tehnique called "fractionary divider" in which the key is adding a "positive" or a "negative" feedback to a D type flip-flop. The effect is just you need, loosing an output pulse. Unfortunately I saw the methode in an old RF german book written in "77 and I can't find it right now. Maybe a deep search with google with "fractionar divider tehnique" ?

greetings, Vasile

Reply to
vasile

What if you use a divide by 25 counter and an R-S flip-flop. The flip-flop drives a gate to gate the output on and off. When the counter hits 16, flip the flip-flop, which gates the output off, and then on count 25 (or would that be 26?) gate the output back on. (I.e., output 16 -> SET, and output 25 -> RESET.

That's if you don't mind bursts of 16 with 9 blanks, so to speak. You did seem to indicate that it doesn't have to be a nice steady frequency, right?

Good Luck! RIch

Reply to
Rich Grise

You don't need a flip flop, just use bit 4.

Reply to
DJ Delorie

What range do you need for the 3 gHz? 2 to 4 gHz ? That shouldn't be hard to cover (20 to 40 MHz oscillator), unless the frequency is going to change very quickly.

Reply to
jpopelish

A phase lock loop, of course.

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Many thanks,

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Reply to
Don Lancaster

how about a 4-bit synchronous counter (75AHC161?), when it overflows, it sets a D flip flop which enables a 74AHC4017 to count up to 9, then have it's 9 output reset the FF? The D flip flp's not-Q output gates the signal.

Reply to
Ancient_Hacker

I actually have such a device. It is a :100 prescaler using the

74LS390 after a U664 1.2GHz :64 counter.

Apparently it was based on a Siemens appnote. Basically there are two

5/4 counters cascaded. An LS02 is used next to the LS390. The input at pin 12 is also fed via an inverter and norred with pin 9. The output goes into pin 4. Pin 4 is inverted and norred with pin 7. This nor output is your :100 signal.

Cheers.

Joop

Reply to
Joop

74'390

sequence

Cool thanks, I tried to find the appnote with google but no luck

Colin =^.^=

Reply to
colin

I could not find it either, but here is something similar to my complete circuit. In mine the last two ls02 ports are left out.

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The original idea was using the 74167, but that chip seems difficult to get these days. It is also used in another version in the above article by the way.

Anyway I am not sure if 50MHz input is a bit too high. You might need an additional :10 counter in front of the LS390. That is something I would not have mind either, since it would put the decimal point of my frequency counter back a normal spot.

Joop

Reply to
Joop

Or use a :256 prescaler and another 4/5 section followed by a /2. That also gives you a :1000 total and bring the LS390 input within range.

Reply to
Joop

yes 50mhz is a bit much for a ripple clounter, maybe the synchronous ones would be better.

I just found the mc12080 will divide by 10,20,40,80 at 1.1ghz and the mc100lvel33 will divide by 4 at 4ghz, leaves quite a few good possibilities. such as /4 followed by /20, then only 1 4/5 stage needed for divide by 100

Would be nice to have as many digits of resolution left as possible as im looking at RF and LO freqs >2ghz but only some khz apart. I did think about gating off the input to the prescaler at the end of the period, then pulsing the input relativly slowly to till it reaches terminal count again to determine the count reached. of course it will probably need a microcontroller to do this, wich might as well make a complete freq counter, but this is then hardly the simple add on it was suposed to be !

Colin =^.^=

Reply to
colin

/80 does not bring the frequency much lower than /64. So I guess if you really want a lot of resolution (not the same as accuracy), then you probably need to think about gating in the early stages. And thus incorporate this into a counter. So not having a seperate prescaler.

And about making a frequency counter. It can be as simple as this if you use a PC:

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I build a modified flavor to unattended monitor VFO stability over time. Great simple gadget. The shown software limits it to 16 MHz (24bit) but the PIC hardware is often used to 50MHz.

Joop

Reply to
Joop

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