Farnell list four dual N-channel FETs. Only one - the Vishay U404 - is a monlithic dual, while the others are pairs of chips mounted in a common package, which works almost as well to minimise temperature dependent off-sets.
National Semiconductor used to make a monlithic dual where the two FETs were inter-digitated, which gave very good temperature matching (though the drain-to-drain capacitance was a bit too high for good high frequency performance) but I don't know a distributor that still stocks them
The standard circuit uses a matched pair of FETs as a long-tailed pair in front of the op amp. The current through the long-tailed pair should be as high as you can make it - that means that the FET should be operating with with the gate only slightly more negative than the source, so that the gate-source diode is only just reverse biased.
The inputs to the op amp are then connected to the drains. The drain resistors have to be chosen to keep the DC voltage at the inputs to the op amp within the common mode range of the op amp, and then you have to check that the gain through the long tailed pair is high enough that voltage noise from the FETs is amplified enough to exceed the voltage noise contributed by the op amp. Too much gain from the long-tailed pair, and the extra phase shift it introduces may make the feedback loop unstable = the frequency compensation buit into the op amp is only designed to cope with its gain and phase shift - but if your amplifier is to provide a high closed loop gain, this shouldn't be a problem.
------------ Bill Sloman, Nijmegen