D-flipflop Phase detectors - outputs of Qb and Qa?

On 5 Mar 2006 11:13:58 -0800 in sci.electronics.design, snipped-for-privacy@ee.ryerson.ca wrote,

Do not post copies of your question in multiple newsgroups. Pick one.

OK. If you can delete the posting from sci.electronics.basics would be great then.

Vitaliy

--- If you want to post to more than one group at once, that's perfectly acceptable, but you should "crosspost". That is, include the names of all the newsgroups you want to post to in the space allocated for that in your newsreader. That way, anyone who reads your post and responds to it will also send replies to the other groups and won't have to send a separate reply from each group you've "multiposted" to, as you did previously.

-- John Fields Professional Circuit Designer

I am using google groups. As far as I know I can only post to one group at a time using google.

Vitaliy

I can tell by the lack of included context that you're posting from Google. Newsgroups are not web forums. Please read the how-to on posting from google accessible from the link below.

Now that I'm done helping to abuse you, I'm going to go see if I can help answer your question...

I'm not clear on how you are connecting your flip flop. Is this a two-state phase detector, such as the one found on page 59 of "Phase-Locked Loop Circuit Design" by Wolaver? That circuit has a pair of FFs, each one clocked by it's associated signal fed data by the output of the opposite FF, with the two outputs feeding an XOR gate. In that circuit the phase detector response is zero at phase=0, and reaches its minimum and maximum at -180 and +180 degrees.

A drawing may help, or something more informative about just how your particular circuit is connected.

Usually these phase detector questions can be answered by drawing out your input sequence then just working through how the phase detector behaves.

Thanks for the link about posting to newsgroupa. I do not have the book you specified, nut here is the link to my lab manual (Labs 3&4). I believe I answered my question by looking closer on Fig3.2: Qa should be increasing with the phase angle (0 to 360)

I guess once we are done with one question, I should ask another simple one: For the charge pump on Fig4.3 there are 4 inputs for the charge pump : UP, notUP, DOWN, notDOWN. Could someone please briefly explain the purpose of those inputs? And should Vcp be/depend on?

Vitaliy

Surf on PFD (phase-frequency detectors).

...Jim Thompson

-- | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | |

I did, most of the papers say that their design works well, but don't go into details as to why it works. I think I understood it from simple circuit analysis though.

Vitaliy

It would be nice if you would learn to include enough of the text of the previous message so we have a clue as to what your reply means.

...Jim Thompson

-- | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | |