Dubious. How can you possibly get planned obsolescence with plausible deniability using parts like that?
Best regards, Spehro Pefhany
-- "it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com
LED current can be optimized for CTR degradation. That's hard to duplicate with capacitors.
John
The Fairchild FPT100s have all 3 leads, and like i say, almost 100 percent of the die is base exposed to the light; AFAIK all other photo transistors are merely re-packaged transistors - usually 2N2222s. I would guess that the speed would be lower with the combo you suggest, along with greater noise. Since i have found the few that i thought i had, you are welcome to up to 3 for experiment.
That's kind of bou, but since they're long obsolete, I probably wouldn't get around to it anyway.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal ElectroOptical Innovations 55 Orchard Rd Briarcliff Manor NY 10510 845-480-2058 email: hobbs (atsign) electrooptical (period) net http://electrooptical.net
Dunnknow whahappen to my answer.. The FPT100 has all 3 pins and around 99 percent of the base is exposed to incoming light. as the emitter is very dinky and in one corner. AFAIK all other phototransistors are plain vanilla devices repackaged; usually 2N2222s. I found my stash (a few anyway) and you are welcome to have 2-3 for experimenting if you want.
Yikes. Trying to learn how to bias a transistor with the h-paramter = black box model? Crikey, that was made artificially difficult. Must have been the only thing the prof understood.
I learned bjt bias with the simplified-t model, then moved to the hybrid-pi model. =20
The two-port h-parameter and a, y, and z equivalents are to be used at = the next higher level, for chains of amplifier / filter stages.
Port parameterization is for SMALL signal analysis, NOT bias set-up. ...Jim Thompson
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