Clamping Gate Voltage of UC3572

Nov 08, 2007 1 Replies

Running with 24 Volt as Vin in a typical UC3572 inverting buck-boost application, the gate Voltage of the PMOS switch transistor would reach -24 Volt and exceed the maximum limit of most transistors. In my last circuit I use a 10 Volt Zener with an antiparallel Schottky Diode and a 10 k resistor from gate to drain.



What do you use for this purpose?



Thanks


Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

If you're not using the low end of the input voltage range, you could capacitively couple the drive, with a suitable gate zener to effect DC restoration across the gate bleeder. This would shave down drive amplitude as the capacitive charges are distributed. For static on bias, the same division would have to be reinforced resistively.

RL

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