Useing Inverter ESD clamping diodes?

For those who dont know.

The 74V1G14 is an advanced high-speed CMOS SINGLE SCHMITT INVERTER.

data sheet

not a good idea, works in theory but there is so much noise on mains supplies. Solution I use is an ac input opto isolator, works forever but you dont get the rise times so you need to design for that.

Yes I just tested it on rectified 28VAC the pulse width was way to long milliseconds. I tried opto couplers but they're slow (sfh615a).

I have a BJT as an inverter; base tied through a voltage divider to the rectified line. The collector does oscillate at turn on. I can see some noise in the line that causes it.

I think what I'll do is use a comparator with hysteresis feed the control signal from the collector to that. That should do it. That's the best way I can think of to have reliable (consistent) performance. I wanted to do it with the PIC and one other active component but I guess two will have to do.

I have some ACPL-214 opto's (AC-input) see how they do.

Is there an isolation barrier in this scheme?

The protection diodes are really emitters of parasitic transistors, so you are essentially performing a latch-up test on the part. Not a good idea.

You can do it, if you limit the SCR current (the current in the protection diodes). Some devices will function correctly even with latchup current and others are not specified to function correctly, but will not latchup.

But, the easy way is to use a resistor and schottky to the rails followed by another resistor to the input of the device (last resistor should never really come into action, but is only there if the forward drop of the schottkys are larger than that of the protection diodes and will limit the current)

Regards

Klaus

Doesn't always have to be Schottky, regular BAV99 and such work. The resistor between that and the input pin would not see more than 500mV or so in drop on a substantial surge. Just make the resistance high enough so that the current stays well under 10% of abs max for the substrate diodes.

Thing is, while the datasheet of the 1G14 specs negative diode current it doesn't spec anything for positive.

Another caveat to watch out for is that spikes don't backfeed the VCC rail and the voltage of that slowly creeps above abs max. My comeuppance with this happened many moons ago. uC design, rock bottom cost, no regulator whatsoever. They used a substrate diode as a rectifier to fed this directly from mains. Something wasn't ok so I probed around. Touched the oscillator pin ... phssst ... crackle ... *BANG*. Turns out they had put dummy code in there so that the uC always draws roughly the same current from VCC but nobody had told me (no software doumentation ...). By touching I stopped the oscillator and the load disappeared.

Lifting the VCC rail is a bigger problem than you suggest. Most regulators will allow you to lift the rail. Certainly LDOs do, i.e. they simply shut off the pass device. You could electrically stress the entire system if you are not lucky enough to latch-up first.

When you bench test a chip for latch-up, a resistive load is attached to the power supply on VCC so that as you inject current via the parasitic diode, it will not lift VCC. That is, you bleed current to keep the regulator working.

I just hate when people try to get clever, like using parasitic diodes and such. The latch-up limits given by the manufacturer are only done at room temperature. On an analog chip, you probably get 100ma, I've worked for companies where the spec was as low as 40ma. Note that the chip doesn't have to run. This is strictly a bench test of a device.

You are really playing with fire when trying to get clever.

To do it right you need to actively shunt the rail.

Sometimes you have to. I try not to burden substrate diodes more than 1% of abs max. If in doubt I ask for test data.

The 1G14 doesn't have a high-side clamp diode. They do have an "esd protection" network, and an abs max input voltage of +7, so the exact situation is fuzzy.

An HC14 type part that does have both clamps will be fine. Using the esd diodes does no harm at low mA currents. Some of the older cmos parts, like the early 4000 series, could latch and burn after even tiny currents were pushed into the inputs.

John