Ceramic cap hoarding

I have seen some polymers die hard at about 150% of rated voltage.

These seemed OK at +120 volts and -20 volts. I ran 6 of them them at

-10 volts for a month and nothing happened. I also ran them alternating +10 and -10 for another month, on a function generator. They were fine.

I don't know if they are "self-healing."

Try some Ron Zacapa 23, straight. Sip it like cognac.

Ooh, I'll have to find some. A shame they don't say who their distributors are...

Speaking of bananas, Crafted makes a "Bananas Foster Forever" mead, not very strong as meads go, it's more for the flavor which is as the name suggests, but also coffee.

Tim

Utter nonsense. It shows what you can expect the capacitance to be at a given voltage. If you don't care about the CV curve, you'd better not use ceramic capacitors at all.

Oh, it's not nonsense; the hysteresis of ceramics is sometimes useful (all our ultrasound transducers were poled at a kilovolt or so), but in an AC circuit model, it means that your 'C-V' curve has dependences on temperature and frequency that invalidate any attempt at calibration.

Capacitance, in a nonlinear material, is a bad property. It's like the resistivity of vacuum: you get nonsense if you try to apply the concept where it isn't appropriate.

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has significant capacitance drop at 12 volts. I want to say it was still below 25% of rated value. That was true of both the X7R and X5R formulatio ns. Since the board has been working for years I figured it just didn't ma tter. Decoupling is not an exact science unless a lot of measurements are taken of the device current surges.

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d to make this post. I was talking about the CV curve which impacts every use of a capacitor.

y. What was your point?

That's not what I said. I was replying to your comment of using a 50 volt capacitor to overcome the C-V loss of capacitance in a 12 volt circuit. I said even a 50 volt cap suffers a large loss of capacitance in a 12 volt ci rcuit, so your premise is faulty. In a circuit I had designed it didn't ma tter that the C-V curve caused a capacitance loss of 75%. That was partly because the circuit was intentionally over designed since power supply is n ot an exact science. In particular with FPGAs the current spikes can chang e as the internal design changes, which it has over the revisions. New fun ctionality is still supported properly by the existing PDS design.

If you think every application has to be calculated to three significant di gits, then I understand your confusion. In many applications the only capa citance concern is a minimum value. It doesn't matter if the cap value is much higher than what is required, so a 4:1 variation is not even an aspect that needs to be considered.

Rick C.

That guy seems to be here only to fling insults. I ignore him.

While there are bad things I could say about you, like your irrational preference for really hoppy beer, "too little knowledge" never came to mind.

Nah, I was just in a bad mood yesterday.

Cheers

Phil Hobbs

The voltage ratings are essentially irrelevant. Like FB current ratings, it's a safe operating value. It has no relation to electrical characteristics.

Indeed, earlier I linked two capacitors, 0805, around 1uF, one 16V the other

Now what we need to do is convince manufacturers to rate capacitors the same way inductors are rated: the voltage for a certain percent saturation, say

Tim

Only a lefty, like you, would lie by snipping.

Here, let me help you out by reinserting what I actually responded to:

"If you want a well-characterized capacitance value, don't try to save money and/or space with X7R material: it won't work. Knowing a curve is not going to save you, either."

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That is not always the case. The CV product is set by the size of the pack age. So in a the case where the size is limiting this product, C is traded off against V by making the layers thicker or thinner and I'm sure this *d oes* impact the C-V curve. I'm pretty sure they don't use the same part fo r every voltage rating in a given package size and capacitance.

Rick C.

That is not always the case.

Uh, which part were you replying to?

Incidentally, Google Groups posts don't quote correctly as you can see, for whatever reason... all the more reason to get a real newsreader and a free news server.

That's precisely why I said "it has no relation". Suppose they use the same thickness dielectric and just reduce the number of plates? I've seen capacitors with such apparent characteristics before.

Never underestimate how cheap a manufacturer can be!

You would hope the CV (or C V^2, depending) is maximized for the package, but that's only reasonably sure in the largest possible values in a given size (where they have no choice).

Incidentally, C0G at >300V or so have greater C/V and C V^2, per dollar, despite how expensive they are in larger values. That's just how bad type 2 dielectrics are...

Tim

seems more likely: CV^2

I've wondered if, say, I want the maximum bypass capacitance at 12 volts, which cap should I buy? X uF at 12 volts, x/2 rated 25, something else?

Rephrased, at a given operating voltage, would using a cap with more nameplate capacitance always give more real capacitance?

There's probably no general answer. I'm using 4.7u 50 volt ceramics at

Ceramics, yes. Aluminum electros go more like CV on volume.

They make the large values taller.

Cheers

Phil Hobbs

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I was replying to the "identical curves" part. I have not done an industry wide study, but when I looked at 16 volt parts (which were specified in th e application, presumably because that was all that was available in the sp ace available) and 50 volt parts. The 16 volt parts were down to roughly 1

On the last batch of boards we made I found they had not built the PWB stac kup according to spec. The power plane spacing was supposed to be 5 to 8 m ils and they spaced everything relatively evenly giving approx. 12 mil spac ing. I didn't insist on remaking the boards because it was very unlikely t o cause failures with the present design and any future firmware revisions are very unlikely at this point. But who knows? It did piss me off enough (along with some other things) to make me switch contract assemblers.

Rick C.

Why? Extra points for showing your math.

Fixed dimensions, variable number of layers. Layer thickness inversely proportional to number.

N * t = K V ~ t, C ~ N/t. So CV ~ N so clearly not fixed with volume.

C * V^2 ~ N/t * t^2 ~ Nt = K

Rick C.

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package. So in a the case where the size is limiting this product, C is tr aded off against V by making the layers thicker or thinner and I'm sure thi s *does* impact the C-V curve. I'm pretty sure they don't use the same par t for every voltage rating in a given package size and capacitance.

Correction, they make the denser values taller. It's how hard they are pus hing the CV^2 limit on the volume. At some point they have to get more vol ume and so taller.

Rick