Cascode Biasing and purpose

The cascode boosts the output impedance of the gain stage, though this is resistively loaded, so I don't think the difference is very significant.

If the threshold of q1 is negative (depletion mode), wouldn't that provide a sufficient voltage across q3 to keep it in saturation?

If you dig through so-called high end audio design, cascodes tend to be used heavily. Generally the gain stage is a bit more linear. I haven't looked at this site in some time, but I think this is where I saw the cascode used heavily:

The cascode JFETs are a type with a higher pinchoff voltage, to bias the differential pair in its linear region with a fixed Vds.

Improved linearity = reduced distortion is a big advantage.

Common mode rejection ratio.

As the inputs both rise the input fets still see similar vds, and therefore the gain and offsets remain about the same. otherwise the gain would fall with rising commmon mode input voltage, hence the input offset remains the same too.

Colin =^.^=

The input FETs will have their source at a positive voltage, around 1V and the cascode ones with a higher Idss require maybe 2V. The Vds of the input pair is constant always 2V and since with a higher common mode voltage also the bias point of the cascode goes up and maintains a high CMRR through a wide range of maybe +/-10V with +/-15V supply

If you look at the datasheet of very low noise FETs you will see a huge input capacitance. (The IF3602 dual has 300pF input capacity, a gm of 750mS and 0.3nV/sqrtHz at f=100Hz) So you need to kill the Miller-cap. The low Vds will help with the noise as well and keeps the dissipation low. FETs get much better when cool. gm increases and leakage is really low. If you want really low noise and you do not need DC response, you should better not use a differential amp, but a feedback arrangement back to the source or something else to linearize the transfer function.

Thank you everyone. It all is starting to make more sense now.

I have IF9030 which have 60 pF of input capacitance. So can i put 2 of these dual JFETs in cascode as i showed in the figure above. I have a current source with 20pF capacitance so i surely cant have a preamp with capacitance greater than 20pF (preferably matching to 20pF). I am tyring to calculate what the input capacity of this cascode circuit wil be.

Yes, i want low noise, very low leekage current and yes no DC response. Another thing my source is differential (few mVs) and essentially there is no common mode signal besides interference from pick up. What kind of feedback u mean Ban.

Two questions come to mind:

I guess the answers have already been given : low leakage and low leakage.

The IF9030 is spec'ed at 0.5nV/rtHz which is 0.7nV/rtHz for a diff pair. The lowest noise opamps use BJT input stages and are thus not low input leakage amplifiers.

Archiees, when you think about it, with *identical* fets for the lower and upper cascode pairs , the lower FETs are just biased at the crossing point between saturated and linear regions (they have identical Id, and the lower fet VDS is the upper fet VGS, which is also the lower fet VGS).

One easy way to improve performances (CMRR-PSRR), if you have enough supply headroom which I take you have, is to increase the lower fets VDS, say to 2 to 3 times their working VGS.

Id Id

V V | | +-| |-+ | | +-||-+ | | | | ___ | ___ | +-|___|--+---+--|___|-+ | 100K | | 100K | | .-. | | |-+ | | --- +-| | 100K| | --- 22n | ->|-+ '-' | +-|

This is a very good answer. A Fet with 0.5nV/sqrtHz is only useful with very low impedance sources, like moving coil pickups, or low ohmic dynamic mikes. If this is used for a guitar pickup with 6k ohmic resistance and 1H inductivity(according to Kevin elsewhere), a nice Fet-Opamp like the OPA267 will do equal with very little effort, using only 1.5mA of 2x9V batteries. Or for lower gains the OPA121, so the poster cannot complain good sound is cheap.. Only 100pF resonate with this pickup at 16kHz(without the losses), and the

.--------+--------+----------+---o | | | | 9V | .-. 22p|| | --- z | | .-||-)------. --- + 3V3 A 680| | | || | | | | '-' | | | GND +----. | | |\\| | | | +---+--|-\\ | ___ +|| .-. | | | >-----+--|___|-||--+--o | | '---)------|+/ | 220 || | | | | |/| | 10u | '-' | GND .-. .-. | | | | | | GND |-+ ADA4841_1 | |330 | |100k | '-' '-' .------+---->|-+ | | | | | | GND C| | +---------------+ C| | | | C| .-. .-.200 .-. | | |100k | |

OPA627

Not really. There is no leakage issue in the cascode as it is "in circuit". Further, BJTs will have significantly more transconductance that jfets, so the Miller killing will be more effective.

Oops, you're right. I missed the 'as the cascode element' because of your second point, which low noise opamps have BJT diff pair inputs and significant bias current.

age.

I've only designed on bicmos processes, but it seems the BJT cascode is quite typical with jfet inputs. It might be that the on-chip jfets are not very space efficient, so the bjt cascode is used. However, I think the BJT cascode design would also be superior in that less trim would be required.

Bicmos processes have epifets, but that is a different beast.