Can you "swamp" a uc clock signal?

Say I wanted to have a run/stop switch on a circuit controlled by a micro-processor. Could I halt the chip by holding the clock line high? Would this have to be done carefully (if at all) to not damage the clock generator circuit?

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_
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Murphy's law says that you happen to do this in the middle of a flash write cycle some day and then the whole thing might be on the fritz from then on.

Use a proper interrupt pin.

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Reply to
Joerg

Don't think I can - the code is burnt, and they use the interupt pin for something else.

Reply to
_

Which micro? If it's static, it shouldn't know the difference, but if it's dynamic (a la dynamic RAM) then you'll have to find a standby pin or something.

Good Luck! Rich

Reply to
Rich Grise

Now why is it you should use proper source control???

Can you supply an external clock and gate that? That'd be safer, although still not very safe.

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Reply to
Tim Wescott

Careful with flash write cycles. Besides shortened clock cycles and the troubles those cause a hard abort during a flash write could make that whole 256-byte or whatever flash segment toastissimo. What it reads next can be like the lottery.

Also, some uC do not activate their brown-out reset upon clock failure. Some don't even have one.

IOW my advice would be: Don't do that. Switch the signal instead and not the uC.

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Reply to
Joerg

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It would have to be done very carefully, and you might not be able to do
it at all.
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Reply to
John Fields

Have a look at the microcontroller datasheet- specifically at the clock signal requirements. *If* you can avoid violating *any* of the requirements, the answer *might* be yes. Typically, for a modern static CMOS micro, this would involve synchronizing the on/off signal with an external oscillator (for example an oscillator module) using something like a 74HC73 to avoid short cycles and resulting malfunctions.

OTOH, if the micro has a clock monitor function and/or a watchdog timer function (and if they are enabled) then it probably won't work. Typically they will reset the micro within milliseconds after a 'failure' of the clock using internal RC oscillators or other timing circuits.

Almost all modern micros have the latter functions, BTW, so your chances are not very good IMHO.

Best regards, Spehro Pefhany

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Reply to
Spehro Pefhany

gh?

ck

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Some Freescale (formerly Motorola) processors have HALT and WAIT instructions to do exactly what you're asking but you have to write the code properly. Obviously you wouldn't WAIT or HALT the processor during flash memory writes but you can get into an extremely low power 'wait for interrupt to re-start' mode.

G=B2

Reply to
Glenn Gundlach

A lot of CMOS micros aren't static. The 8-bit variety likely are, though. This is something that you *really* need to investigate. It's often not specified directly. Check if there is a minimum frequency, though that may be a PLL thing (more ointment in your fly).

I thought most of those used a timer/counter off the oscillator.

I would tend to agree. Unless it's on the banner as a feature, I'd assume it's not possible.

Reply to
krw

Yes. Some of the modern 32-bit micros have something like half a dozen PLLs to generate various clock domains from a single crystal, and none of them are going to like the clock running too slow, let alone stopping. And even some 8-bit ones now have PLLs, so minimum external clock frequency is in the low MHz if the PLL is enabled.

No, because that's potentially disastrous if the clock fails (say, due to a bad crystal). Has to be independent and preferably entirely internal. I've seen some that combined such a timer/counter for the watchdog with a clock monitor to ensure there's still a reasonably fast clock coming in. Useless if a watch crystal is used (clock monitor has to be disabled) but usually something that runs off a watch crystal isn't connected to anything that can hurt anyone or anything much.

Best regards, Spehro Pefhany

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Reply to
Spehro Pefhany

On a sunny day (Tue, 10 Nov 2009 00:13:21 GMT) it happened _ wrote in :

Some micros can be static clocked, look in the datasheet for 'static clock', some need a clock all the time, in that case you cannot do it. I think shorting a clock *input*, when using a crystal connected to a micro, is no problem.

Reply to
Jan Panteltje

The only answer to this is to read the specifications for the UPC, the memory, and perphial chips. Some UPCs are dynamic and have a minimum clock speed, others are static and don't. Ditto for memory and support chips.

Reply to
PeterD

Other possible options? Can you cobble up a second microcontroller circuit and trigger that from the original? That way, you could put the run/stop function on the 2nd uPc and not have worry much about the first one.

Is there a RESET line on the processor? Can you just hold that line (stop) until you need it (run)?

I assume this is someone else's code that you don't have access to? Otherwise, the obvious advice is to just implement your run/stop in coding - assuming you have the hardware resources available.

Good luck.

-mpm

Reply to
mpm

If the clock fails (bad crystal) your watchdog has nothing to bark at. It's dead, Jim. The 8051's watchdog timer was a counter/timer (I had one 8051 watching the other ;). I believe the TI 5K series of DSPs watchdogs' are too.

Reply to
krw

Some can be stopped in one state but not the other. Again, this sort of thing is going to be yelled about in feature headings.

Reply to
krw

I remember reading about maximum clock frequency change for one micro recently, I believe it was the AVR. Suggests that rapid frequency change is a bad idea. This might only affect certain functions, though, probably involving timers and TWI/USART functionality.

M
Reply to
TheM

Why would they care? The problem is the PLLs losing lock.

Reply to
krw

involving

AFAIK a few AVR's do indeed have PLL, but I believe those are used for PWM/Timers. I guess we're both correct.

M
Reply to
TheM

involving

Timers and such won't go squirrely if the oscillator changes. PLLs will.

Reply to
krw

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