Calculating BJT switching time

Hi

I've got a circuit where a NPN (BC847B) is driven to turn on a load referenced to positive supply and the transistor as a common emitter switch. I need to calculate the time it takes to switch it off.

There's a fall time and a storage time causes by minority carriers. This article goes into depth about the subject:

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But, I need a way to calculate the switching time related to how much current I drive out of the base and how much current the transistor switches.

Anyone know of practical formulas for this, or do I need to extrabulate the switching times in the datasheet to be sure I have worst case values?

Thanks

Klaus

Reply to
Klaus Kragelund
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Got a schematic?

John

Reply to
John Larkin

Not easy. My 1962 textbook on the subject...

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Pray that the Spice models are right, and simulate ;-) ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
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Reply to
Jim Thompson

Yes, like this:

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L32 is the primary of the drive transformer and is driven by +/- 1.8V

100kHz with a deadtime of 1us (where the source is 0V, to avoid shootthrough). What I want is to add a cap in parallel with Rbase3 and Rbase4 to speed-up removal of the excess charge from the base, to allow for less deadtime. But I need to know the worst case values....

Regards

Klaus

Reply to
Klaus Kragelund

That is a very good and detailed reference on the subject, thankyou very much :-)

Regards

Klaus

Reply to
Klaus Kragelund

That's great, thanks Jim! I assume that it is from this text,

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I have recently 'bumped' into the storage time issue in the saturated common emitter 'switch'. There was a blurb in the first edition of AoE that gold doping was/is used to speed things up. Is this to reduce the collector lifetime, refered to at the top of page 345 in your posted text?

George H.

=A0 =A0 ...Jim Thompson

=A0 =A0| =A0 =A0mens =A0 =A0 |

=A0 | =A0 =A0 et =A0 =A0 =A0|

=A0|

=A0 =A0 =A0 |

ide quoted text -

Reply to
George Herold

Yes. Al Phillips was assistant VP at Motorola when I joined. His text was for my first Master's course, which he taught.

That doesn't quite make sense now. I think it really means charge stored in the B-C junction. I know, to speed things up, you reverse bias the base-emitter and suck charge out of the _base_.

(Lots of '60's theories were just that... theories ;-)

...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Ay yi yi.

Do you expect some kind of advantage from the rail-connected emitters? Sort of defeats the purpose, or advantages, of using a transformer.

Is this for cyclic or arbitrary waveforms?

RL

Reply to
legg

In power devices, the di/dt of reverse base current at turn-off can be profiled for a particular device, but I'm not sure scales down in current or up in frequency at lower power levels.

Transformer-driven, as is this schematic, I'd be tempted to introduce a fixed off-bias in a series cap, as 0V isn't going to do much 'turning off' during the enforced dead-time.

In self-oscillating inverters (look into any replacement ccfl light bulb base), you can synchronise the frequency of operation upwards by shorting a coupled (saturating) base drive transformer if the off bias is present. This was the basic inverter drive configuration used in a lot of Boschert off-line current-fed inverters.

The same shorting technique can PWM the inverter, given sufficient charge storage in the biasing network.

In power circuits, you could avoid deep saturation using a baker clamp network. The same diodes in the network could be used to establish the fixed off bias. Again, this is at lower power frequencies (

Reply to
legg

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