Hi, folks:- Some semiconductors have multiple pins connected together internally via bonding wires and pads (as opposed to lead frame connections).
Any guesses as to what current such an internal connection would actually fail at? (talking about short-term failures, like 30 minutes) at room temperature.
Heraeus has some data here, but the fusing current depends on the loop length.
Can I count on 1A+ in 99.9% of circumstances?
Best regards, Spehro Pefhany
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No. It varies from ~150mA to ~1A _per_wire_ depending on the wire diameter and metal (gold/aluminum). Some power devices use ribbon bonds, and I have no data on that capability. ...Jim Thompson
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Den mandag den 24. februar 2014 13.22.20 UTC+1 skrev Spehro Pefhany:
this any help ?
-Lasse
Thanks. I'm mostly concerned with non-power devices where the bonding wires might be lighter gauge.
Thanks, there's some good stuff there, though mostly for power devices.
I'm worried more about things like micros that have two Vdd or Vss pins, what current between those pins would cause the bond wires to fuse.
Aren't those multiple Vdd pins used for deglitching the internal logic Vdd from I/O Vdd, the bonding wire inductance effect. Unless something has changed, I'm pretty sure it's not for increased current handling.
You're right, that's exactly how they're intended to be used.
But since they're brought out, it's possible for large currents to flow between them without much voltage (tens or 100's of mV).
--sp
I'd hazard (:-) a guess and say, Stay below 100mA... they're likely to be 0.7mil Aluminum. ...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
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I love to cook with wine. Sometimes I even put it in the food.
putting a short PCB trace between the two should protect you from that.
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One of the power supply pin "sets" will be at substrate potential, so you kind of hope their isn't a lot of current flowing between them since that current would be in the substrate.
The last paper looks like the one to use. Figure on 1mil Al wire. I can tell you that table is twice as aggressive as I ever went.
One of the papers went into a long discussion of heat transfer from the wire to the plastic that comprises the chip, i.e. a lateral heat flow. I don't know of any packaging engineer that depended on that kind of heat transfer. They always assuming the heat transfer was strictly in the wire, i.e. axial heat flow. Note that it is proportional to the cross sectional areas of the wire, so a 41.4% increase in diameter gets you twice the current. Also, the ability to remove heat depends on the amount of copper connected to the pin. In the case of a power supply on a multilayer PCB, i.e. power and ground planes, that would be a lot of copper to act as a heat sink.
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