Why not just monitor the supply voltage, trigger an interrupt when the crit ical voltage is met during a dropout and save state to flash. It only takes a ms or so to do that. When you detect the drop of the supply voltage, set all peripherals and external circuits to idle, and use only power for the flash storage task
Cheers
Klaus
Something like the General Instruments 1400? It was used in a lot of Unisys terminals to store their configuration.
We use a lot of FRAM. You damn near can't wear it out and you can write at almost any sane SPI speed.
I don't know that it actually has a limit. It's like asking whether type 2 ceramic capacitors have a wear life. (Which they do, in a sense, but that's about aging: time, not cycles.)
I haven't heard if there's actually weird physics that does cause a finite cycle life on very small bits of dielectric.
Tim
-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
Well, they do specify a write limit in their data sheets, but it is an insanely large number. The FM24C256, which we use a tone of, specifies
10^10 read/write endurance. I don't know how they arrived at that, but there it is.
At a mere 100K writes per second, that can be done in less than a month.
-- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
Well, obviously, you pick a part appropriate for the job. I don't write more than 1/S on average. If you are just using it to store calibration data, it would last "forever". The newer FRAMs have endurances much, much higher, I just don't need it.
The OP said,
Which would make the part ideal, which is why I mentioned it.
I can't tell which way John went on this, but if anyone else has a need for nonvolatile storage with unlimited read/write capability here is a pretty good solution. Looks like they have a 4 kbit and a 16 kbit part.
Infinite read/write cycles to the SRAM array with EEPROM to back up the SRAM on power fail. 1 millions write cycles on the EEPROM and >200 year retention. "The EERAM works from -40C to 125C and is automotive grade qualified." Beats the hell out of anything using a battery.
Looks like they have some block protect logic for parts of the SRAM array and the chip has three ways to trigger a backup operation. It senses power fail itself and uses a cap to power the backup operation. It can be triggered by an external signal or it can be commanded by software. Backup takes 50 ms.
In a SOIC-8 or TSSOP package it is not very large and is even available in an 8 pin PDIP. The only down side I see it a 5 volt power requirement. Opps, they have 3 volt versions as well! I'm impressed. I wonder if anyone else makes these?
-- Rick C
Potentially nice part, thanks.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
speaking of nice parts,
The board is still in layout (only about 500 more BGA balls to connect) and I have an SO8 SPI serial flash on the schematic.
We have a microSD card for the main storage, and we found some "high endurance" SD cards, intended for video storage, so we might use the SD as the current-setting backup, with some algorithm that further helps the high-endurance+wear leveling. Or I can stuff a FRAM into the SPI location.
-- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
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