Audio Blending Between Opamps?

It might have been a mistake mentioning a DJ crossfader because I really do want a linear fade. That was just an example. It seems to be the consensus that running a resistor to the ground will give me a "dip" (which I don't actually want.)

The gain on the second stage is something I kind of skipped over I guess. I have it setup as a voltage follower in a non-inverting configuration so the gain will be 1+Rinput/Rfeedback and since the feedback loop has no resistor, I didn't think about the input resistance. I agree that I definitely need a fixed resistor but will adding one prevent the mix from reaching 100% A and 0% B? Won't the sources' "presence" at the second stage's input be determined by the ratio of the resistance along their path to the 2nd stage? Suppose that both of the opamps in the 1st stage had a 100K resistor between them and the 100K pot and then the wiper of the pot goes to the input of the 2nd stage's opamp. If the pot were in the middle position, both of the input signals would follow a path with a resistance of 50K

+100K so the two would mix 1:1. But if the pot was positioned toward one end, one of the signals's paths would have a resistance of 100K +100K=200K and the other would have a resistance of 0K+100K=100K so they would mix 2:1, not 1:0. And I think the same would be true if the two fixed resistors were replaces with one resistor between the pot and the 2nd stage input.

Maybe I would be better off just making the two opamps in the 1st stage inverting and using the pot to control their gain from 0 to 1. Then the two outputs could easily be mixed 1:1 with fixed resistors.

Oh, wait. What was I thinking? That would be really nice but I can't do it because the the whole point of those opamps in my circuit is to act as a buffer (with a high input impedance) for signals coming from external sources with unknown resistances. Otherwise, that would be the perfect solution. Maybe I'll have to consider adding another set of opamps and do my blending that way if there isn't a satisfactory way of blending all the way to 0% : 100% using just a pot and resistors between two opamps.

Pot yes.

Resistors no.

0 to 100% both ways.

Simple enough?

John

There are three concerns here. First, the 100K value is a little high, 10K is a good value for circa 1V signals. High impedances cause pickup and noise, while low impedance can contribute to bass distortion (your op amps actually heat and cool and the thermal drift causes a bass audio distortion source).

Second, the 'third opamp' should be connected as an inverting amplifier, feedback resistor from output to the summing junction. That makes the pot wiper a 'pseudo-ground' and prevents the buffer amplifiers from seeing variances in load due to the other buffer's signal. It also allows you to largely ignore CMRR for that third amplifier. Note this means a minimum resistance should be maintained, you want to connect the buffers to the potentiometer through a 1k fixed resistor.

Third, there are situations where (for instance) right/left channel signals have a significant phase relationship, and the wrong blending would cancel the signal instead of reinforcing it. It's useful to have a relative-polarity-reversal switch in this kind of signal blender.

Often for audio, an input can go open circuit (wire pulled loose); if your buffers are inverting op amps, that's OK. If they're followers, that makes the input likely to hum loudly at 60 Hz... we've all heard that happen.

I hate to say it but not entirely. When you say "pot yes, resistors no" do you mean it will works as expected with the pot ("pot yes") but not when you add the fixed resistors ("resistors no")? If that IS what you meant, then it looks like I a might need to redesign things a bit since 0-100% is what I am after but a fixed resistor is needed to keep the second stage's gain in check when the pot is all the way to one end.

If that is not what you meant (I could get 0-100% using both a pot and fixed resistors), I'll believe it (you guys are the experts) but I am still curious how the numbers work out. In one of my last posts, I was working under the assumption that the ratio of signal reaching the

2nd stage's input was the the same as the ratio of the resistance along each signal's path from the 1st stage's outputs to the 2nd stage's input. Is that right?

OK, you win, I am defeated. I give up.

John

Oh no! Don't give up! :) I was just wondering. I'm sort of new at this.

I'm really not trying to be difficult. I'm just trying to figure this stuff out.

On Sun, 18 May 2008 20:55:15 -0700 (PDT), Brandon wrote:

--- Then run this:

Version 4 SHEET 1 992 692 WIRE 112 -192 -64 -192 WIRE 32 -144 0 -144 WIRE 32 -112 32 -144 WIRE -64 -96 -64 -192 WIRE 0 -96 -64 -96 WIRE 112 -80 112 -192 WIRE 112 -80 64 -80 WIRE 208 -80 112 -80 WIRE 320 -80 208 -80 WIRE 0 -64 -224 -64 WIRE 208 -32 208 -80 WIRE 320 -32 320 -80 WIRE 32 -16 32 -48 WIRE 32 -16 0 -16 WIRE 560 -16 368 -16 WIRE 848 0 656 0 WIRE 416 32 368 32 WIRE 768 48 736 48 WIRE 768 80 768 48 WIRE 656 96 656 0 WIRE 736 96 656 96 WIRE 848 112 848 0 WIRE 848 112 800 112 WIRE 208 128 208 48 WIRE 320 128 320 48 WIRE 320 128 208 128 WIRE 656 128 320 128 WIRE 736 128 656 128 WIRE 768 176 768 144 WIRE 768 176 736 176 WIRE 208 208 208 128 WIRE 320 208 320 128 WIRE 480 224 368 224 WIRE 656 224 656 128 WIRE 112 240 -64 240 WIRE 416 272 416 32 WIRE 416 272 368 272 WIRE 32 304 0 304 WIRE 32 336 32 304 WIRE -64 352 -64 240 WIRE 0 352 -64 352 WIRE 112 368 112 240 WIRE 112 368 64 368 WIRE 208 368 208 288 WIRE 208 368 112 368 WIRE 320 368 320 288 WIRE 320 368 208 368 WIRE 0 384 -128 384 WIRE -432 416 -432 368 WIRE -320 416 -320 368 WIRE -224 416 -224 -64 WIRE -128 416 -128 384 WIRE 480 416 480 224 WIRE 560 416 560 -16 WIRE 32 432 32 400 WIRE 32 432 0 432 WIRE -432 560 -432 496 WIRE -320 560 -320 496 WIRE -320 560 -432 560 WIRE -224 560 -224 496 WIRE -224 560 -320 560 WIRE -128 560 -128 496 WIRE -128 560 -224 560 WIRE 416 560 416 272 WIRE 416 560 -128 560 WIRE 480 560 480 496 WIRE 480 560 416 560 WIRE 560 560 560 496 WIRE 560 560 480 560 WIRE 656 560 656 304 WIRE 656 560 560 560 WIRE -432 672 -432 560 FLAG -432 368 +6 FLAG -320 368 -6 FLAG 0 -16 -6 FLAG 0 432 -6 FLAG 0 -144 +6 FLAG 0 304 +6 FLAG 736 48 +6 FLAG 736 176 -6 FLAG -432 672 0 SYMBOL Opamps\\\\LT1007 32 -144 R0 SYMATTR InstName U1 SYMBOL Opamps\\\\LT1007 32 304 R0 SYMATTR InstName U2 SYMBOL Opamps\\\\LT1007 768 48 R0 SYMATTR InstName U3 SYMBOL voltage -432 400 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 6 SYMBOL res 224 64 R180 WINDOW 0 36 76 Left 0 WINDOW 3 36 40 Left 0 SYMATTR InstName R1 SYMATTR Value 10k SYMBOL res 224 304 R180 WINDOW 0 36 76 Left 0 WINDOW 3 36 40 Left 0 SYMATTR InstName R2 SYMATTR Value 10k SYMBOL voltage -320 512 R180 WINDOW 0 -47 101 Left 0 WINDOW 3 -35 4 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value 6 SYMBOL voltage -224 400 R0 WINDOW 3 24 104 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value SINE(0 1 1000) SYMBOL voltage -128 400 R0 WINDOW 3 24 104 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V4 SYMATTR Value SINE(0 1 3000) SYMBOL res 672 320 R180 WINDOW 0 36 76 Left 0 WINDOW 3 36 40 Left 0 SYMATTR InstName R3 SYMATTR Value 10k SYMBOL sw 320 64 R180 WINDOW 0 32 15 Left 0 WINDOW 3 32 44 Left 0 SYMATTR InstName S2 SYMBOL sw 320 304 R180 WINDOW 0 32 15 Left 0 WINDOW 3 32 44 Left 0 SYMATTR InstName S1 SYMBOL voltage 480 400 R0 WINDOW 3 24 104 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V5 SYMATTR Value PULSE(0 1 .010 1e-6 1e-6 .01 .02) SYMBOL voltage 560 400 R0 WINDOW 3 24 104 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V6 SYMATTR Value PULSE(0 1 .02 1e-6 1e-6 .01 .02) TEXT -392 632 Left 0 !.tran .03 uic TEXT -400 600 Left 0 !.model SW SW(Ron=1 Roff=10Meg Vt=0.5Vh=0)

or this:

Version 4 SHEET 1 992 692 WIRE 112 -192 -64 -192 WIRE 32 -144 0 -144 WIRE 32 -112 32 -144 WIRE -64 -96 -64 -192 WIRE 0 -96 -64 -96 WIRE 112 -80 112 -192 WIRE 112 -80 64 -80 WIRE 208 -80 112 -80 WIRE 320 -80 208 -80 WIRE 0 -64 -224 -64 WIRE 208 -32 208 -80 WIRE 320 -32 320 -80 WIRE 32 -16 32 -48 WIRE 32 -16 0 -16 WIRE 592 -16 368 -16 WIRE 800 0 736 0 WIRE 960 0 880 0 WIRE 416 32 368 32 WIRE 880 80 848 80 WIRE 880 112 880 80 WIRE 208 128 208 48 WIRE 320 128 320 48 WIRE 320 128 208 128 WIRE 464 128 320 128 WIRE 736 128 736 0 WIRE 736 128 544 128 WIRE 848 128 736 128 WIRE 960 144 960 0 WIRE 960 144 912 144 WIRE 848 160 768 160 WIRE 208 208 208 128 WIRE 320 208 320 128 WIRE 768 208 768 160 WIRE 880 208 880 176 WIRE 880 208 848 208 WIRE 480 224 368 224 WIRE 112 240 -64 240 WIRE 416 272 416 32 WIRE 416 272 368 272 WIRE 32 304 0 304 WIRE 32 336 32 304 WIRE -64 352 -64 240 WIRE 0 352 -64 352 WIRE 112 368 112 240 WIRE 112 368 64 368 WIRE 208 368 208 288 WIRE 208 368 112 368 WIRE 320 368 320 288 WIRE 320 368 208 368 WIRE 0 384 -128 384 WIRE -432 416 -432 368 WIRE -320 416 -320 368 WIRE -224 416 -224 -64 WIRE -128 416 -128 384 WIRE 480 416 480 224 WIRE 592 416 592 -16 WIRE 32 432 32 400 WIRE 32 432 0 432 WIRE -432 560 -432 496 WIRE -320 560 -320 496 WIRE -320 560 -432 560 WIRE -224 560 -224 496 WIRE -224 560 -320 560 WIRE -128 560 -128 496 WIRE -128 560 -224 560 WIRE 416 560 416 272 WIRE 416 560 -128 560 WIRE 480 560 480 496 WIRE 480 560 416 560 WIRE 592 560 592 496 WIRE 592 560 480 560 WIRE -432 672 -432 560 FLAG -432 368 +6 FLAG -320 368 -6 FLAG 0 -16 -6 FLAG 0 432 -6 FLAG 0 -144 +6 FLAG 0 304 +6 FLAG 768 208 0 FLAG 848 80 +6 FLAG 848 208 -6 FLAG -432 672 0 SYMBOL Opamps\\\\LT1007 32 -144 R0 SYMATTR InstName U1 SYMBOL Opamps\\\\LT1007 32 304 R0 SYMATTR InstName U2 SYMBOL Opamps\\\\LT1007 880 80 R0 SYMATTR InstName U3 SYMBOL voltage -432 400 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 6 SYMBOL res 224 64 R180 WINDOW 0 36 76 Left 0 WINDOW 3 36 40 Left 0 SYMATTR InstName R1 SYMATTR Value 10k SYMBOL res 224 304 R180 WINDOW 0 36 76 Left 0 WINDOW 3 36 40 Left 0 SYMATTR InstName R2 SYMATTR Value 10k SYMBOL res 896 -16 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R5 SYMATTR Value 10k SYMBOL voltage -320 512 R180 WINDOW 0 -47 101 Left 0 WINDOW 3 -35 4 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value 6 SYMBOL voltage -224 400 R0 WINDOW 3 24 104 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value SINE(0 1 1000) SYMBOL voltage -128 400 R0 WINDOW 3 24 104 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V4 SYMATTR Value SINE(0 1 3000) SYMBOL res 560 112 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R3 SYMATTR Value 10k SYMBOL sw 320 64 R180 WINDOW 0 32 15 Left 0 WINDOW 3 32 44 Left 0 SYMATTR InstName S2 SYMBOL sw 320 304 R180 WINDOW 0 32 15 Left 0 WINDOW 3 32 44 Left 0 SYMATTR InstName S1 SYMBOL voltage 480 400 R0 WINDOW 3 24 104 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V5 SYMATTR Value PULSE(0 1 .010 1e-6 1e-6 .01 .02) SYMBOL voltage 592 400 R0 WINDOW 3 24 104 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V6 SYMATTR Value PULSE(0 1 .02 1e-6 1e-6 .01 .02) TEXT -392 632 Left 0 !.tran .03 uic TEXT -400 600 Left 0 !.model SW SW(Ron=1 Roff=10Meg Vt=0.5Vh=0)

JF

Now you get to teach Brandon how to run SwCAD III.

You really have to drive an op amp hard to see thermal distortion. This is more of an issue with circuits that have low amounts of feedback.

I'm not sure I approve of this scheme. FIrst of all, yes, the inverting amplifier configuration has less issues with the CMRR. But putting the wiper direction to the negative input means you have the standard inverting configuration, Say op amp 1 has resistor R1 going to the center tap Op amp 2 has resistor R2. [The potentiometer is of value R1 + R2. For the third op amp, you have feedback resistor RF. Using your scheme, we can consider R1 and R2 to have minimum values of Rmin, which you set to 1k. Now at the extreme position, isn't the gain of the 3rd op amp RF/Rmin? But as you add resistance (move the pot positon) the gain drops to RF/R1 from the op amp 1 path. The other resistor should fall out of the picture in the gain equation since it has no potential across it in a superposition sense.

Maybe I interpretted your circuit description incorrectly.