For most LDOs the ESR does not need to be low. For some ESR in a range around 3R to 10R is a requirement. Stability with a very low ESR ceramic output capacitor is considered to be a design feature a lot of LDOs will honk with a ceramic output capacitors.
There is interaction between output stability networks and input resistance, inductance and decoupling. It could be your zener slope resistance is causing a problem
I would lash up an accurate as possible copy of what you have on the bench and apply step load changes looking at how the regulator output responds. It is about the only way you can asses how much stability margin you have and what affects it.
Actually, it is cheap insurance that exactly that will not happen. The resistor adds a zero that cancels a pole in the closed loop response. the regulator is a synthetic inductor and creates a parallel resonance with the capacitor. The resistor is a resonance Q killer. This approach works with additional parallel capacitance up to about the value of the capacitor with the series resistor. I have used a series resistor with every LDO regulator I have ever put into a design, though I must admit I have not used anything close to a representative example of all the types available. Most LDOs specify a resistor range for the cap ESR to accomplish what I am doing, here, or show a range of series resistance that is stable for a given capacitance. I always use a capacitor with a low ESR and add the resistance, explicitly, so I have control of it.
I have an uncomfortable hunch that the zener might be an issue here. That would be a pain as there isn't any other way to lop off voltage when there is no allowance for any extra current and no more space than for a SOT23.
TI didn't say that though, they only said leakage could still let too much Vin get through. So I sent them the zener data sheet which says it won't (leakage guaranteed below Iq at desired min zener voltage). Let's see what they respond.
I do that as well. However, when the data sheet clearly states that it isn't necessary and actually recommends a ceramic of at least x uF I would expect that statement to be correct and lab tested ;-)
Yes, but that problem was not at all related to the TPS chips. A (rather expensive) bench power supply was throwing out huge load change glitches. The chips were dying immediately after power-up which doesn't happen anymore. Got a cheap bench supply, problem solved.
I did check that during the design. Vin goes only to around 20V. In part because Iq of this regulator is well above the leakage guarantees for this zener plus there is another 7uA or quiescent from standby circuits that's always there.
Trust but verify. In other words, look at the ringing with and without the resistor. I'll bet you that adding the resistor improves the damping. I think they are doing their best to make the series resistance unnecessary, but that does not necessarily make it unhelpful.
Yes, but that carries the risk of working for one batch and then failing on another. On LDOs there is an upper limit for ESR and above that things can seriously get out of hand. Especially when the data sheet does not mention what that upper limit might be. Even in cases where it does mention the ESR range all you get is a typical range graph, no hard guarantees in the tables. But at least then you can stay far away from the limits and place your series resistance in the middle.
Then parallel the RC (especially with a larger than minimum C) in parallel with the minimum C the data sheet specifies. You will still get significant damping from the RC (not as much but a useful amount), but never operate the regulator without the minimum low ESR capacitance the data sheet calls for. The data sheet often shows a minimalist but marginal situation, unfortunately.
That's a good idea. However, I'd like to hear back from TI about how marginal things are. Since they've got their own data (presumably a lot more than is released via the data sheet) plus my data and schematic there should hopefully be some ideas coming from there.
Done that and after some wait time got through. No more insights. Arrgh.
Yep. Been through all airlines now, all Sunday flights and the Monday morning flights are full (actually some are over-booked I was told...). Double arrgh :-(
Here's a theory. I apologize if it has already been stated.
The alkalines can deliver large current. The 0.1 cap at the input will charge quickly.
A small amount of lead inductance in the cable to the battery forms a resonant tank with the 0.1uF cap. Due to the high transient current, the voltage at the cap can go well above the battery voltage.
The zener has a large capacitance. Maybe 750pf to 1nf. With a fast input, it looks like a short.
If the zener is between the 0.1uF input cap and the LDO, it is effectively a short circuit at the instant the cable is plugged in.
The result is plugging in the power cable causes a transient that exceeds the max input voltage, thus blowing the device. Perhaps the initial contact resistance is not reliable, so it doesn't reach the high voltage all the time and some parts may survive.
A solution might be to move the zener so it is between the battery and the 0.1uF input cap.
This places the zener capacitance in series with the 0.1uF and forms a capacitive voltage divider. This will reduce the transient at the input to the LDO. It also removes the zener impedance and improves the bypassing at the input to the LDO.
This places the zener capacitance in series with the cable inductance and raises the resonant frequency of the tank. The losses will be higher, so the peak voltage will be lower. The zener impedance is also in series with the resonant tank, further reducing the initial transient current and the resulting overvoltage.
If the zener is already between the battery and the 0.1uf input cap, then you have done the it right way, and I don't know what could be causing the problem.
It is already between the battery and the 0.1uF cap. Supposedly the TPS77550 would run without a cap at the input but it is recommended to provide 0.047uF or more.
Well, it's a little mystery for now until I get my hands on a unit. The battery cables are under one inch each. Also, inserting the battery does not produce any failure. It is when a load is presented that the LDO blows. Best case we just had a bad batch, worst case there is some behavior that hasn't been noticed so far by TI and other users. They said they aren't aware of any issues with this LDO to date. Had a long chat with them a few hours ago. This is more encouraging than a case a decade ago where I had a few app EEs in a phone conference (other vendor) and suddenly one of them said "Oh drat!".
Engineers don't say, "Oh drat"... they say, :Awwww S..t" ;-)
...Jim Thompson
-- | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | |
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| 1962 | I love to cook with wine. Sometimes I even put it in the food.
I've just seen some changes to regulator datasheets where there is a caution about having too low an ESR capacitor. Surprised the hell out of me: not something I would have looked for, but now I know. May be worth checking out (Issue is loop stability and would not expect it to be distructive to the part but...)
The TPS77550 datasheet doesn't list a minimum but something on it has been revised in Sep-2006. And we see the problems with recent chips...
Who knows but I'll parse the old and new versions side by side. There is something nice about having two PCs next to each other in the office :-)
Now I am going to have to figure out which tools they still let you take on board. Calling the airline won't help because they won't have the foggiest idea what I am talking about when I say FET probe, and I don't want to give up $2k worth of gear at security.
Crikey! If they're so spooky I think I'd be inclined to use a discrete PNP, so I could compensate the loop properly.
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
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