about that LDO

I had a TEM2 box on my workbench, to futz with firmware, and figured that, since I had all the gear handy, I'd check the transient response of the LDO that we'd been having such a friendly discussion about.

This was the circuit, the 1.2 and 1.1 supplies:

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I cranked up a function generator to make a 5 volt p-p square wave, and capacitively coupled that into TP46. So I was poking 100 mA current steps into the LDO output.

I had to external trigger and signal average to get the noise down, at

5 mv/div and a 1:1 probe.

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TP47..50 are current shunts. U70 was obviously manufactured in Italy.

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Load step at TP46:

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and the gate drive...

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Yup, it's a bit underdamped, about what the LT Spice sim predicted. It sure doesn't do anything radical.

I could add some resistors in series with C247 and C250 next time, to improve damping, but it doesn't really matter. The transient bump is only 9 mv, and the ringing is a lot smaller than that.

Well, that was fun. Back to firmware....

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John Larkin         Highland Technology, Inc

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John Larkin
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So show us the sim with those (MC33072 + ZXMN6A25G) parts in LTspice.

I'll provide the models if you can't manage to get them yourself off the web. ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Jim Thompson

I designed and simulated a simple LDO in about an hour. The sim showed it to be a tad underdamped, but plenty good enough, so I built it. The built board behaves just like the sim and works fine.

You spent far longer to come up with a simulation both oscillates and does weird random stuff. Now you want me to change my simulation to agree with yours, and defy measured reality. Next you'll expect me to buy an oscilloscope that shows oscillation where there is none.

Idiot.

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John Larkin                  Highland Technology Inc
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John Larkin

John "Village Idiot" Larkin,

My sim matches your sim, exactly... using the parts on the sim schematic.

You posted a different schematic as "in production", and claim your sim of different components proves its worthiness..

So sim your "production" schematic in LTspice and show us that your "production" schematic _is_ the same.

Otherwise it's just the same old Larkin game: "Proof" without any verification. ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Jim Thompson

They are all essentially the same. On the PDF schematic, you can't see the ESR or the additional off-page bypass caps or the actual load. Not that they matter much. And of course I played with a range of ESRs and loads in the simulation; that's what sims are for... it's a tool for exploring the problem space.

The first two waveforms that you included in your PDF are so bizarre that anyone with half a brain would do a double-take and see where the model weirdness was coming from. No simple opamp-mosfet loop would do things that crazy, especially that mess on page 14.

But I could be wrong here: "half a brain" may be setting the threshold too high.

My oscilloscope pics are real, and the values are unchanged from the original PDF schematic. A little underdamped, as simulated. It works fine.

You're still an idiot, because you emotions have blown away your ability to think.

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John Larkin                  Highland Technology Inc
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John Larkin

Hardly. I've uncovered a discrepancy/puzzle between PSpice and LTspice.

PSpice matches your (non-MC33072) LTspice simulation. However, your original (in production) schematic shows poor phase margin and spurious transient behavior in PSpice.

In LTspice the transient response is similar to your previous LTspice sim... but I get messages "fill-ins=83", etc.

LTspice users, what is a "fill-in" ?? ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Jim Thompson

I don't see any messages on my LT Spice runs.

So where are the weird pulses on your page 14 coming from? They are obviously not real.

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John Larkin         Highland Technology, Inc

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John Larkin

There is a "progress" bar at the bottom of the pane, showing the current time in the simulation... mine shows the time, fill-ins=[number].

I'll ask Helmut what that means.

Maybe, maybe not. I got a job from AT&T once, an oscillating chip, but didn't show in (their) simulation... it showed in PSpice. I got paid $BIG for finding a fix that didn't require a re-spin ;-)

The Bode plots of your circuit definitely show marginal phase margin.

Nevermind. I just found it... If I don't force a small timestep in PSpice, I match the LTspice simulation.

See...

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Forcing a small timestep finds quirks that otherwise slip by. So you pay a price for speed (and "fill-ins"). (LTspice users: Is there a way to force a max timestep and avoid the "fill-ins"?)

Why does it work on your board (although I wouldn't call your scope traces "pretty")? Something isn't modeled that's there affecting the performance... maybe the off-brand (Pasta) 33072 has lower GBW, like the original Op-Amp in your first LTspice simulation?

Now you'll probably rant about me wasting my time.

It's not a waste... it was educational. I have not done an LDO with an NMOS, only PMOS, where (as you have alluded) you can access nodes and dominate loop behavior with a (not quite) Miller approach.

So I thank you for being so obnoxious that you forced me to dig for reality and further refine my pursuit of perfection :-p ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Jim Thompson

It's a little underdamped. I've said that from the beginning. But a Bode plot is a bad way to evaluate a nonlinear system for step response.

"Master Circuit Designer", what a joke. Anybody competant would look at those crazy waveforms and *know* that the simulator is messing up. And investigate.

But you were so determined to find something wrong with my simple circuit, you put your brain in "park" and simulated garbage. And made a presentation-grade PDF of it for all the world to see.

Give it up, moron. My board works just like my sim.

You didn't waste enough time to get it right.

If I taught you anything, it's to not let your emotions shut off your ability to think. But probably not.

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John Larkin         Highland Technology, Inc

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John Larkin

As I pointed out a few days ago...

From: Jim Thompson Newsgroups: sci.electronics.design Subject: Re: Good Cheese - Student Edition Date: Mon, 21 May 2012 11:17:33 -0700 Message-ID: [snip]

Here's an interesting article about Bode Plots versus measuring output impedance (real and imaginary parts)....

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Your LTspice simulation is like viewing a real circuit with a low bandwidth scope.

Going down to 100ps stepsize, I see what I'd call 10MHz "motorboating".

But you're happy, so I'm deliriously happy :-) ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Jim Thompson

Turns out that what I'm seeing is a long, slow current bang-bang, easily compensated...

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Not perfect, there's still some hunting.

What gave me the clue was watching the NMOS drain current. ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Jim Thompson

Seriously, that's really not /THE/ LDO people think about these days since you have a gate drive power supply a factor of 10x the output and the main drive is a common drain and not a common source.

Reply to
bloggs.fredbloggs.fred

have a gate drive power supply a factor of 10x the output and the main drive is a common drain and not a common source.

Gosh, I guess I didn't follow the rules.

Linear has some LDOs that need a higher "vbias" supply. If you need, say, 1.2 for an FPGA core supply, there's usually something higher around to derive the regulator control stuff.

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The 3083 has an NPN emitter-follower output. Interestingly, its transient response looks just like mine, a little underdamped. It's also interesting in that it has no ground pin.

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John Larkin                  Highland Technology Inc
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John Larkin

have a gate drive power supply a factor of 10x the output and the main drive is a common drain and not a common source.

I suspect that the 3083 has a fairly low gain (1000 maybe?) wideband, uncompensated error amp. The only deliberate pole in the loop is the ceramic load cap. That's a pretty sensible way to do a voltage regulator these days, what with big ceramics being cheap.

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John Larkin                  Highland Technology Inc
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John Larkin

ce you have a gate drive power supply a factor of 10x the output and the ma= in drive is a common drain and not a common source.

Well- your circuit is far removed from the sophistication of those high per= formance marvels. I notice the 3071 does not tell you the I/O differential = used for some of their transient response photos, and the 3083 is biased we= ll away from dropout in its tests. Both of those circuits make some attempt= to close their error loops out to the MHz regime, whereas your power sourc= e follower swamps the output feedback with the integrating capacitor starti= ng in low KHz.

Reply to
bloggs.fredbloggs.fred

you have a gate drive power supply a factor of 10x the output and the main drive is a common drain and not a common source.

performance marvels.

I designed it in about an hour and it works fine.

Design an LDO yourself, and show it to us.

their transient response photos, and the 3083 is biased well away from dropout in its tests. Both of those circuits make some attempt to close their error loops out to the MHz regime, whereas your power source follower swamps the output feedback with the integrating capacitor starting in low KHz.

It's not really acting like a source follower with just a few tenths of a volt D-S. It's more like a controlled resistor. That changes everything. Think about it.

And, as noted, it works fine. I'm an engineer, not some simulation queen.

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John Larkin                  Highland Technology Inc
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John Larkin

you have a gate drive power supply a factor of 10x the output and the main drive is a common drain and not a common source.

performance marvels. I notice the 3071 does not tell you the I/O differential used for some of their transient response photos, and the 3083 is biased well away from dropout in its tests. Both of those circuits make some attempt to close their error loops out to the MHz regime, whereas your power source follower swamps the output feedback with the integrating capacitor starting in low KHz.

^^^^^^^^ Umm, do the math on that.

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John Larkin                  Highland Technology Inc
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John Larkin

d

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since you have a gate drive power supply a factor of 10x the output and the= main drive is a common drain and not a common source.

=20

performance marvels.

of their transient response photos, and the 3083 is biased well away from d= ropout in its tests. Both of those circuits make some attempt to close thei= r error loops out to the MHz regime, whereas your power source follower swa= mps the output feedback with the integrating capacitor starting in low KHz.

You have no choice about the region of operabilty of the FET since VDS

Reply to
bloggs.fredbloggs.fred

since you have a gate drive power supply a factor of 10x the output and the main drive is a common drain and not a common source.

performance marvels.

their transient response photos, and the 3083 is biased well away from dropout in its tests. Both of those circuits make some attempt to close their error loops out to the MHz regime, whereas your power source follower swamps the output feedback with the integrating capacitor starting in low KHz.

VDS

Reply to
John Larkin

Now *that* sounds like not-well-understood to me.

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John Larkin                  Highland Technology Inc
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Tim Williams

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