A digital design question

I'm playing around with some 7400 series logic, trying to teach myself the basics of digital design. I've been able to come up with a working circuit for a 24 hour digital clock easily, but I'm struggling trying to think of a way to make a 12 hour clock. Specifically my problem is the reset of the hours counter - when the tens digit of the hours section is 0 I need the units counter to count from 1 to 9 and roll over to 0 (for example 09 pm to 10 pm) but when the tens digit of the hours counter is a 1 I need the units counter to start counting at 1 (for example 12 pm - 1 am). I'm using 74LS93 series plain binary counters and assorted logic, and after working on it for a long while I can't think of a way to get it to work without using something like a presetable counter. Anyone have any ideas?

Reply to
Bitrex
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What are you doing with the outputs from the LS93? Presumably you are decoding these with other gates to drive a display?

If so I would decode a count of 0 as 1, 1 as 2 etc. Then when the LS93 hits 12 decode that to reset the counter so it runs 0 to 11.

Reply to
Raveninghorde

Treat the sequence as

00 01 02 03 04 05 06 07 08 19 10 11

Increment left digit when right digit becomes 9. Clear both when both = becomes 12.

Left digits are decoded as is.

Right digits are decoded such that 0 is displayed as 1, 1 as 2,... 9 as 0.

So the above sequence is displayed as

01 02 03 04 05 06 07 08 09 10 11 12

Sylvia

Reply to
Sylvia Else

Dagnufit!

Ravinghorde posted the same solution while I was thinking.

Sylvia.

Reply to
Sylvia Else

Just proving that I contribute to electronics :)

Reply to
Raveninghorde

Thanks for your reply. I forgot to mention that I was hoping to use BCD to 7 segment decoders for the output, and I think it's going to be hard to shift the output of the counter like that so the appropriate digits are applied to the input of the decoder. I guess I can decode the shifted outputs individually but it'll take a lot of logic.

Reply to
Bitrex

If you want to keep the LS93 rather than change counter then when the count gets to 13 you need to reset the counters and then provide an extra count pulse to the input of the counters to get the start count as 01.

So decode the 13 state use this to reset the counters. Also feed the pulse through a capacitor to differentiate it with a resistor to ground to discharge the cap. Feed this into a gate along with the existing clock signal so that either can clock the LS93. Make sure it is the edge that is caused by 13 goint back to zero that is differentiated, you may need an extra inverter.

That's the principle.

Reply to
Raveninghorde

I realize that you are trying to learn digital circuit design but this is really a job for a microprocessor. A PIC or some other processor can do all of the functions of xtal clock generation, timing, BCD to seven segment conversion, latching as well as drive LEDs or LCD's for the display on a single chip. It can all be done in a few lines of code and is trivial compared to using 1970's TTL technology. You might as well try to do it with

6SN7 tubes if you want ancient methods. How about filing out your own brass gears to make a clock?

I believe your time would be better spent learning a programming language and how to accomplish various tasks in a processor than fooling around with TTL. This would give you a foundation for a whole range of neat projects for the 21st century. Plus the versatility of processors allows a virtual infinity of designs in one type of device. Other than learning how to work with a few NAND gates and D-Flops, there isn't any future in complicated TTL methods for projects like yours.

Reply to
Bob Eld

One caution: it's tempting, when using discrete logic, to build klugey, asynchronous hairballs. That tends to be most efficient when wiring up 7400-series logic, but it doesn't scale. Do that some, but note that most "modern" logic is done in CPLDs and FPGAs and ASICs with zillions of fast gates and flops available, and is usually fully synchronous. I'd suggest you follow up this project with an identical function, but implemented fully synchronously in a small FPGA. Dev kits aren't expensive.

There is a place for asynchronous hairball logic, so it's good to be comfortable with both.

John

Reply to
John Larkin

When I did this a couple of decades ago I cheated and used 74ls83 4 bit adders. The 74ls283 is probably cheaper now (it has the power at the package corners instead of the middle).

Reply to
Dennis

Maybe use a 4 bit adder, catch the 1010 state and force the 1 ouputs to zero. Or catch the 1001 state going into the adder, and force the 0 inputs to 1, so that the address overflows to zero.

I did a 7 segment decoder at uni. I don't remember it being so bad. It was part of an exercise of a technique whose name I no longer know, but I vaguely remember drawing squares around digits on a truth table. Maybe someone can give a name for the technique.

Sylvia.

Reply to
Sylvia Else

Karnaugh maps?

Best regards, Spehro Pefhany

--
"it's the network..."                          "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
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Reply to
Spehro Pefhany

What, you mean like this guy?

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I do have some experience writing code in C for microcontrollers like the AVR series. I'd like to eventually learn something like VHDL, but not having done much work with digital logic I thought this might be a fun challenge to get my feet wet. Right now the project is only a simulation in the "HADES" environment - it remains to be seen if I actually have the motivation to put it on a breadboard once it works in the simulator....:)

Reply to
Bitrex

Yes. Thanks.

Sylvia.

Reply to
Sylvia Else

And thus we end up with systems that use a programmable microcontroller to perform a three-way OR function.

Sylvia.

Reply to
Sylvia Else

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Yeah, that's the ticket. A Vacuum tube Nixie counter. Now that's a project! I think making brass gears and mechanical escapements would be easier.

So, you have programming and processor experience then what's with the TTL? I guess if you are just playing around and simulating for learning purposes then what the hell? If you are actually laying out a board, purchasing components, etc. Then I'm not so sure. In other words if it is a real project to get a complete working clock with minimum effort and cost, what then? Have fun.

Reply to
Bob Eld

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Somehow I suspect that a 12Hr clock requires a couple of more gates than a three-way OR function. Do ya think? Actually I might use a less than a dollar, 8 pin processor for a three input OR gate. Even TTL would be a 14 pin part would it not?

Reply to
Bob Eld

I would second the above ideas and suggest that you also try to do a clock that employ synchronous counters with a pre-load function such as 74LS160, 74LS161 ....(there are counters with pre-load). Please do not stop to live your dream of designing and building a TTL clock.

I would suggest that you also try to design the clock using one of the inexpensive CPLD or FPGA kits. Having attained the skill to do that would serve you well in future.

The Xilinx SK-CRIIL-G Coolrunnner Development Kit includes a

2X16 LCD display at a very reasonable cost. +-$50 See
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3rd in list of develoment kits.

Gerhard van den Berg Meraka CSIR

Reply to
Gerhard

Yes.

My point was that if people don't learn about basic logic gates, how are they going to judge whether a PIC is appropriate? If you all you have is a hammer...

Sylvia.

Reply to
Sylvia Else

The problem with using a PIC for everything is when you need something faster such as memory map decoding for a processor. In the end you need to understand hardware logic.

But I agree if speed isn't an issue it is easier to throw in a small PIC. Then when the 3 input OR needs to have an input inverted it is just a code change.

Reply to
Raveninghorde

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