A digital design question

I know a lot of programmers who haven't the faintest idea of how computers work or how electricity behaves. Programming a PIC will teach you close to zero about digital logic. Wiring up a heap of

7400-series logic involves all the fundamentals of logic design: clocking, prop delays, races, noise, thermal issues, packaging, grounding, bypassing.

You might as well try to do it with

Digital logic design is not ancient quite yet. Gears aren't either, come to think of it.

Umm, where will future computers and ASICs come from if nobody knows how to design logic?

There's also the fundamental difference between computing (sequential execution) and logic (parallel, usually synchronous processing.) If a person starts out learing C, and progresses to C++ and Java and such, they may well be ruined for ever designing in VHDL.

And a serious FPGA or ASIC designer will earn a lot more than a script kiddie, roughly 3x or so at current consulting rates.

John

Here are the schematics of a clock I built in the '70s:

The clock has been running for over 35 years.

Please post some pics.

don

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But then you would want to insert an adder so that 12:34 could be = properly=20 displayed.

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Not quite that simple grasshopper. Someone has to understand the guts of= those=20 uPs and uCs; or the day will come when we cannot make them any more.

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If what you need is a three input or gate try this

SC70-6 package, single gate. 'bout 50 cents.

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That may be later in Bitrex' self learning course. Personally, i think = 'e=20 is on the right path for now.

BTW thanks for the link, i think is may get one on those to have fun = with.

g

Put a PROM on the hours counter to transcode between 12 and 24 hour and let the counter run always 24 hr mode. If you want to learn logic you also need to know look up tables. My digital clock performs exactly those functions in a Freescale 68HC908JK8 processor. Assembly programming and logic design are very similar.

G=B2

If I understand you correct you want the following sequnce:

01 02 03 04 05 06 07 08 09 10 11 12 01 ... I would recommend to use two synchronous counters with a parallel load (eg 74x160/2). Decode the state '12' to generate PE (parallel load enable) and set the parallel load value to '01' - done. Note that PE must also be a synchronous input.

/ww

Or decode '13' if the PE is asynchronous. It's really ugly (introduces a race and a lot of glitches), but it'll usually work for a clock.

I see what you did there. It looks like the SN74121 is used to give the counter an extra pulse so that when the clock is in 12 hour mode it rolls over to 1 instead of 0. That's the thing that was giving me headaches trying to figure out. I've decided to go with the synchronous counters as suggested by others in my design, which have parallel load so I can duck that issue... :) I like the time-set circuitry, I wonder if I can adapt that to a synchronous design. I imagine I will have to find a way to substitute the 1 Hz clock with a sped up clock so the changes will happen more quickly.

Well, I've been playing around with this a bit trying to use the 74160. The problem I'm having is that the reset is asynchronous but the load is synchronous, so if I decode the "12" to generate a PE for the first digit in the hours the counter never wraps around to "13" to trigger the reset of the second digit. Is there a way around this or must I use the

74162? I don't think I have any of those here...

Nevermind, figured it out. I was trying to do some dumb thing like loading on the first counter and resetting the second. I understand now to load 1 on the first counter and zero on the second and use the PE on both counters.