snipped-for-privacy@yahoo.com wrote in news: snipped-for-privacy@i40g2000cwc.googlegroups.com:
[...]Here's one with 500nA current drain at 2Hz and 6V Vdd. The output risetime is 70uS so it needs to drive a schmitt input when used as a clock. It works up to 300Hz. The current drain would be higher at 67Hz, but still orders of magnitude lower than the 74hc132:
The trick is to use high value load resistors instead of two mosfets in series.
Mike Monett
Hello Win,
Yes, if the input lingers in that range too long it's indeed quite high. I have never really had that though, the consumption of all those CMOS circuits was in the tens of uA, or in the single-digit uA range for CD4000 stuff which I usually prefer for power economy unless it's too slow or the client wants two-cell operation.
I like them. When the last bit of fuel economy is to be squeezed out you can still add a transistor up front that takes it through the transition phases in a jiffy. Costs another inverter though because of the phase reversal but that's less than a couple of cents.
Regards, Joerg
Hello Mike,
Ah, the old CD4007. Marvelous chip. But the art of designing such clever circuits must have been lost on the younger generation and there is no such device anywhere in a lower voltage node logic family. I wish there was.
CD doesn't cut it when all you have is one or two alkalines because the threshold of the FETs becomes iffy. But there is nothing wrong with placing a FET or BJT in front of an HC14, or a lower voltage family for single cell operation. Except that it can cause expressions of disgust in design reviews but I kind of got used to that.
Regards, Joerg
Joerg wrote in news:1mb6g.64916$ snipped-for-privacy@newssvr14.news.prodigy.com:
Hello Joerg,
Wouldn't the 74HC05 work just as well as the CD4007? The datasheet is spec'd for operation at 2V Vcc :
Also, I wonder what would happen if you took a low-voltage cmos inverter and grounded Vcc. If this disabled the upper p-channel device, maybe you could use the lower n-channel as a simple open drain inverter with a low gate threshold voltage.
That chould really stir things up in a design review:)
Mike Monett
Mike Monett wrote in news:Xns97B8CFBEF5D30Noemailadr@216.196.97.131:
Come to think of it, why does the 74HC05 even need a connection to VCC? The spec shows ICC is 2uA!
Mike Monett
Answering my own questions - the 74hc05 is buffered internally, so it would act like a plain 74hc04 around the threshold.
The confusion arises since the TI datasheet seems to imply the 74HC05 is a single inverter as the symbol shows only one device and there is no mention of internal buffers. Fairchild shows three cascaded inverters for the 74HC04, but they do not make a 74HC05 for comparison.
The SGS-Thompson datasheet for the 74HC05 makes everything very clear. The device definitely has three cascaded inverters:
Answering my second question about grounding VCC, the internal buffers would be disabled. So even if the upper output device might be turned off, no signal could get through the chip to turn the lower device on.
So, those ideas won't work.
Mike Monett
Hello Mike,
Well, that's just the problem, there is nothing at all in the lower voltage series that offers the versatility of the CD4007. You can use some of the unbuffered devices but will have to contend with substrate diodes, capacitive rail coupling and stuff like that. The 74HCU04 is one example, it's just one FET pair per section.
At the end of the day a lot of my designs end up being mostly discrete. While there are some transistor arrays these are mainly from Asian sources and not always easy to procure.
Regards, Joerg
A circuit/trick/technique collector from way back, I've long enjoyed David Johnson's site (the one you linked to).
Thanks for that nifty oscillator Mike.
James Arthur
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