I'm trying to put this in perspective, but I haven't found a satisfying answer.
You have a 1/3 VDD and 2/3 VDD as described below for logic levels:
And yet the datasheet values are often values that represent 30%/70%. Then there is Don Lancaster's CMOS Cookbook, which speaks of 30% and 70% levels (page 19 of the 2nd edition).
Obviously, the manufacturer's datasheet has the final say, not to mention that 1/3VDD and 30% VDD are close.
But it strikes me strange that we have these two "rules" in use. Can anyone expand on this?
Warren