24Hz to 60Hz PLL?

When I demonstrated (~1968) my first analog PLL (for aircraft ADF) pulling out a signal completely buried in noise, none other than Gardner himself said it couldn't be working :-)

For the OP, since he has a "square" source of 24Hz, I'd simply use a PFD, a VCO at ~120Hz, DIV5 as feedback, DIV2 from VCO to get 60Hz. ...Jim Thompson

Elaborating: Those suggesting harmonic filtering...

Not an easy filtering job to keep the 3rd from "wobbulating" everything ;-) ...Jim Thompson

These days the least PCB space way to do this may well be with a digital PLL in a microprocessor -- if this is _all_ you're doing you can do it with _just_ a PIC in an SO-8 or smaller package; doing this in analog without a dedicated chip will take at least two 14- or 16-pin chips (4046 and a 74xx counter), plus a small handful of resistors and some not-too- small caps.

But one wants to choose something that is known to work, and fits with the OP's abilities and situation. In a product I'd probably do it with a micro; for a one-off I'd probably do it the 'analog' way.

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This PLL will be following a movie camera that can vary in speed a few percent. I doubt that I would be able to push or pull and xtal that far off of it's designed freq.

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=A0 =A0 ...Jim Thompson

I was waiting for some feedback on how stable my original design would be. Since the comparator of my chip is edge detecting, I won't need the NE555 (thanks for that tip). Some of the post recommend going the micro processor rout because at that low frequency it would take a little while for the loop to settle down. This delay is completely acceptable as it takes about 5 seconds for the flywheel in the tape deck to get up to speed, and the audio is real fluttery before that happens. This would require me to pre-role the deck by a few seconds if I was not planning on slating the scene. If I am slating I can wait till the loop locks, and slate the camera/tape when lock is achieved. I can add an LED for an indication of lock.

How much jitter can I expect? Does this jitter just effect pulse width, or does it effect frequency?

Here is my original design:

Looking at the CD4046b data sheet, it looks like the most straight forward design would be a Camera --> CD4046 (With an Divide by N CD4059 dividing by 5)-->CD4060 ( Signal Out from Q2 would be divide by

I already have a bunch of CD4060's from my last project. I also have some NE556's. Seems very easy.

Thanks, Chris Maness

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For a few % I suggest an LC oscillator. The same ideas still apply. The advantage of LC over RC is that it is naturally more stable so you need a smaller range on the correction.

Microdyne was still using a second source version of the MC4044 ten years ago. We were having trouble getting a good supply, but i couldn't convince them to switch to the 4046. The 'Engineer' responsible for supporting older designs insisted it couldn't be used, because it was too slow. He wouldn't look at the 20 year old drawings, and wouldn't admit that the PLL only had to lock to a 100 KHz reference.

I have no idea who made the 4046 copy originally, but they blundered several features :-( ...Jim Thompson

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I have always found it mind sposhing anti-clever to use (or even = generate)=20 a 1 pps signal from GPS receivers.

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Not so hard with a VCO at 240 Hz, divide by 10 with symmetrical output

Trivial with a PLL... not so trivial when suggesting a harmonic game. ...Jim Thompson

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Even the likes of myself have done that with RC filters. You might want to use good op-amps (low noise, low bias current) though.

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I am noticing there seems to be many ways to skin a cat ;o)

I will order the chips for the PLL as this seems to be the most straight foreword way, and proto it on my solderless bread board. If it does not work, I am only out of a couple of bucks and wiser for the experience.

Thanks Guys, I will report back.

Chris Maness

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Making the filter have a notch at the 3rd harmonic and a peak at the

A second notch at the 7th harmonic may be needed.

If you want to stay in the semi-digital mode a little longer, you can make some oneshot like circuits that construct this:

...---................---........---.............

---......----------......--------......---------- ......---..........---..............---..........

With just two RCs, you can make the 5th harmonic much larger than the other components. This replaces one of the pole pairs in the filter with some oneshots.

Wasn't that designed by, or for RCA in the early '70s? I know someone who worked for RCA at that time, but he was at the fab.

I think you're right, Michael. "CD"4046 seems to be the very first moniker.

I've not actually tried the current 74HC4046 version but, were it done right, with today's processing, it could be a screamer. ...Jim Thompson

The PD is okay, though it still has the deadband, but they screwed up the VCO--it craps out at low voltage. No more 100:1 or 1000:1 VCO ranges.

Cheers

Phil Hobbs

The HC4046s I've used have about a 7 ns deadband. Annoying.

We've done some nice phase/frequency detectors in FPGAs. Rather than try to make the outputs do charge pumping, we bring out separate hard-CMOS UP and DOWN pulses, and use outboard schottky diodes+resistors into the analog stuff. The whole charge pump concept is a tad flakey, in my opinion.

I also like single flipflop bang-bang detection for narrowband loops. No deadband, and loop gain is infinite!

John

If you implement the "charge pump" current mirrors on-chip, as I regularly do in my ASIC designs, it becomes a non-issue. ...Jim Thompson